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DS99R124Q_14 Datasheet, PDF (7/31 Pages) Texas Instruments – 5 - 43 MHz 18-bit Color FPD-Link II to FPD-Link Converter
DS99R124Q
www.ti.com
SNLS318C – JANUARY 2010 – REVISED OCTOBER 2010
DC Electrical Characteristics (continued)
Over recommended operating supply and temperature ranges unless otherwise specified.(1)(2)(3)
Symbol
Parameter
Conditions
Pin/Freq.
Min
Typ
VOH
High Level
Output Voltage
IOH = −0.1 mA
VDDIO
- 0.2
VDDIO
VOL
Low Level
Output Voltage
IOL = +0.1 mA
IOS
Output Short
Circuit Current
VOUT = 0V
LOCK, PASS,
GND
OS[2:0]
-3
IOZ
TRI-STATE
Output Current
VOUT = 0V or VDDIO
-15
FPD-Link II LVDS RECEIVER DC SPECIFICATIONS
Differential
VTH
Input
Threshold High
Voltage
Differential
VCM = +1.2V (Internal VBIAS)
VTL
Input
Threshold Low
Voltage
−50
RIN+, RIN-
Common
VCM
Mode Voltage,
Internal VBIAS
RT
Input
Termination
1.2
75
80
SUPPLY CURRENT
IDD1
IDDTX1
IDDIO1
IDDZ
IDDTXZ
IDDIOZ
Supply Current
(includes load
current)
43 MHz Clock
Checker Board
Pattern,
VODSEL = H,
SSCG = On
Figure 2
VDDn= 1.89V
VDDTX = 3.6V
VDDIO=1.89V
VDDIO = 3.6V
Supply Current
Power Down
PDB = 0V, All
other LVCMOS
Inputs = 0V
VDD= 1.89V
VDDTX = 3.6V
VDDIO=1.89V
VDDIO = 3.6V
All VDD(1.8)
pins
VDDTX
VDDIO
All VDD(1.8)
pins
VDDTX
VDDIO
70
30
0.35
1
0.15
0.01
0.1
0.4
Max
0.2
+15
+50
92
80
40
1
1.5
4
0.05
0.4
0.8
Units
V
V
mA
µA
mV
mV
V
Ω
mA
mA
mA
mA
mA
mA
mA
mA
Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.(1)(2)
Symbol
Parameter
Conditions
Pin/Freq.
Min
FPD-Link II
tDDLT
Lock Time(3)
SSCG = Off
SSCG = On
5 MHz
5 MHz
SSCG = Off
43 MHz
SSCG = On
43 MHz
tDJIT
Input Jitter Tolerance
EQ = Off
Jitter Frequency > 10 MHz
Figure 12
FPD-Link Output
Typ Max Units
6
ms
14
ms
5
ms
8
ms
>0.45
UI
(1) The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not guaranteed.
(2) Typical values represent most likely parametric norms at VDDn = 1.8V, VDDTX = 3.3V, VDDIO = 1.8V or 3.3V, Ta = +25 °C, and at the
Recommended Operation Conditions at the time of product characterization and are not guaranteed.
(3) tDDLT is the time required by the deserializer to obtain lock when exiting power-down state with an active PCLK.
Copyright © 2010, Texas Instruments Incorporated
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