DRV8860_16 Datasheet, PDF (7/41 Pages) Texas Instruments – 8-Channel Serial Interface Low-Side Driver

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LATCH
tSU(LATCH)
CLK
X
tCLK
tCLKH
tCLKL
DRV8860, DRV8860A
SLRS065E – SEPTEMBER 2013 – REVISED NOVEMBER 2015
tHD(LATCH)
X
DIN
X
MSB
LSB
X
tSU(DIN) tHD(DIN)
DOUT
Z
MSB
tD(DOUT)
Figure 1. Serial Interface
LSB
Z
NO.
1
2
3
4
5
6
7
8
9
LATCH
REF DES
t_CLK
t_CLKH
t_CLKL
t_SU(DIN)
t_H(DIN)
t_SU(LATCH)
t_H(LATCH)
t_OFF(LATCH)
t_D(DOUT)
Table 2. Serial Timing
DESCRIPTION
MIN
CLK cycle time
5
CLK high time
2.5
CLK low time
2.5
Setup time, DIN to CLK
1
Hold time, DIN to CLK
1
Setup time, LATCH to CLK
1
Hold time, LATCH to CLK
1
Inactive time between writes and read
2
Delay time, CLK to DOUT
tf(LATCH)
tr(LATCH)
tH(LATCH)
TYP
MAX
UNIT
µs
µs
µs
µs
µs
µs
µs
µs
1.5
µs
CLK
X
Part 1
Part 2
Part 3
Figure 2. Special Commands
Table 3. Special Commands
NO.
REF DES
DESCRIPTION
10
t_f(LATCH)
LATCH fall to CLK rise
11
t_r(LATCH)
CLK fall to LATCH rise
12
t_H(LATCH)
LATCH high time
MIN
TYP
1
1
2
Part 4
MAX
X
UNIT
µs
µs
µs
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