DRV8860_16 Datasheet, PDF (31/41 Pages) Texas Instruments – 8-Channel Serial Interface Low-Side Driver

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11 Layout
DRV8860, DRV8860A
SLRS065E – SEPTEMBER 2013 – REVISED NOVEMBER 2015
11.1 Layout Guidelines
• The VM pin should be bypassed to GND using a low-ESR ceramic bypass capacitor with a recommended
value of 0.1-μF rated for VM.
• This capacitor should be placed as close as possible to the VM pin on the device with a thick trace or ground
plane connection to the device GND pin.
• The VM pin must be bypassed to ground using and appropriate bulk capacitor. This component must be
located close to the DRV8860.
11.2 Layout Example
Where the pull-up voltage (V3P3) is an external supply in the range of the recommended operating conditions for
the digital open-drain outputs.
V3P3
VM
DIN
CLK
LATCH
GND
DOUT
nFAULT
ENABLE
10 µF
0.1 µF
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
Figure 39. DRV8860 Layout
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Product Folder Links: DRV8860 DRV8860A
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