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DRV8860_16 Datasheet, PDF (4/41 Pages) Texas Instruments – 8-Channel Serial Interface Low-Side Driver
DRV8860, DRV8860A
SLRS065E – SEPTEMBER 2013 – REVISED NOVEMBER 2015
6 Pin Configuration and Functions
PW (TSSOP) PACKAGE
(TOP VIEW)
VM 1
DIN 2
CLK 3
LATCH 4
GND 5
DOUT 6
nFAULT 7
ENABLE 8
16 OUT1
15 OUT2
14 OUT3
13 OUT4
12 OUT5
11 OUT6
10 OUT7
9 OUT8
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PWP (HTSSOP) PACKAGE
(TOP VIEW)
VM 1
DIN 2
CLK 3
LATCH 4
GND 5
DOUT 6
nFAULT 7
ENABLE 8
16 OUT1
15 OUT2
14 OUT3
13 OUT4
12 OUT5
11 OUT6
10 OUT7
9 OUT8
NAME
PIN
I/O
(1)
DESCRIPTION
Pin Functions
EXTERNAL COMPONENTS OR CONNECTIONS
GND
VM
ENABLE
LATCH
CLK
DIN
DOUT
nFAULT
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
5
— Device ground
1
— Motor power supply
8
I
Output stage enable
control input
4
I Serial latch signal
3
I Serial clock input
2
I Serial data input
6
O Serial data output
7 OD Fault
16 O Low-side output 1
15 O Low-side output 2
14 O Low-side output 3
13 O Low-side output 4
12 O Low-side output 5
11 O Low-side output 6
10 O Low-side output 7
9
O Low-side output 8
All pins must be connected to ground
Connect to motor supply voltage. Bypass to GND with a 0.1 μF ceramic capacitor
plus a 10 μF electrolytic capacitor.
Logic high to enable outputs, logic low to disable outputs. Internal logic and
registers can be read and written to when ENABLE is logic low. Internal pulldown.
Refer to serial communication waveforms. Internal pulldown.
Rising edge clocks data into part for write operations. Falling edge clocks data out
of part for read operations. Internal pulldown.
Serial data input from controller. Internal pulldown.
Serial data output to controller. Open-drain output with internal pullup.
Logic low when in fault condition. Open-drain output requires external pullup.
Faults: OCP, OTS, UVLO, OL (DRV8860 only)
NFET output driver. Connect external load between this pin and VM
NFET output driver. Connect external load between this pin and VM
NFET output driver. Connect external load between this pin and VM
NFET output driver. Connect external load between this pin and VM
NFET output driver. Connect external load between this pin and VM
NFET output driver. Connect external load between this pin and VM
NFET output driver. Connect external load between this pin and VM
NFET output driver. Connect external load between this pin and VM
(1) Directions: I = input, O = output, OD = open-drain output
Table 1. External Components
COMPONENT
C(VM1)
R(nFAULT)
PIN 1
VM
V3P3 (1)
PIN 2
GND
nFAULT
RECOMMENDED
0.1 µF ceramic capacitor rated for VM
10 µF electrolytic capacitor rated for VM
> 4.7 kΩ
(1) V3P3 is not a pin on the DRV8860, but a V3P3 supply voltage pullup is required for open-drain output nFAULT.
4
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