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THS1206-EP Datasheet, PDF (6/43 Pages) Texas Instruments – 12-BIT 6 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTERS
THS1206ĆEP
12ĆBIT 6 MSPS, SIMULTANEOUS SAMPLING
ANALOGĆTOĆDIGITAL CONVERTERS
SGLS126A − JULY 2002 − REVISED FEBRUARY 2003
electrical characteristics over recommended operating conditions, VREF = internal, fs = 6 MHz,
fI = 2 MHz at −1dBFS (unless otherwise noted)
ac specifications, AVDD = 5 V, BVDD = DVDD = 3.3 V, CL < 30 pF
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
SINAD Signal-to-noise ratio + distortion
Differential mode
Single-ended mode (see Note 1)
63
65
dB
64
dB
SNR Signal-to-noise ratio
Differential mode
Single-ended mode (see Note 1)
64
69
dB
68
dB
THD Total harmonic distortion
Differential mode
Single-ended mode
−70 −67
dB
−68
ENOB
(SNR) Effective number of bits
Differential mode
10.17
11
Bits
Single-ended mode (see Note 1)
10.4
Bits
SFDR Spurious free dynamic range
Differential mode
Single-ended mode
67
71
dB
69
dB
Analog Input
Full-power bandwidth with a source impedance of
150 Ω in differential configuration.
FS sinewave, −3 dB
96
MHz
Full-power bandwidth with a source impedance of
150 Ω in single-ended configuration.
FS sinewave, −3 dB
54
MHz
Small-signal bandwidth with a source impedance
of 150 Ω in differential configuration.
100 mVpp sinewave, −3 dB
96
MHz
Small-signal bandwidth with a source impedance
of 150 Ω in single-ended configuration.
100 mVpp sinewave, −3 dB
54
MHz
NOTE 1: The SNR (ENOB) and SINAD is degraded typically by 2 dB in single-ended mode when the reading of data is asynchronous to the
sampling clock.
timing specifications, AVDD = 5 V, BVDD = DVDD = 3.3 V, VREF = internal, CL < 30 pF
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
td(DATA_AV) Delay time
5
ns
td(o)
tpipe
Delay time
Latency
5
ns
CONV
5
CLK
6
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