MSP430FR59691 Datasheet, PDF (6/131 Pages) Texas Instruments – MSP430FR59xx Mixed-Signal Microcontrollers

MSP430FR5969, MSP430FR59691, MSP430FR5968, MSP430FR5967
MSP430FR5959, MSP430FR5958, MSP430FR5957
MSP430FR5949, MSP430FR5948, MSP430FR5947, MSP430FR59471
SLAS704C – OCTOBER 2012 – REVISED JUNE 2014
4 Terminal Configuration and Functions
4.1 Pin Diagram – RGZ Package – MSP430FR596x and MSP430FR596x1
Figure 4-1 shows the 48-pin RGZ package.
www.ti.com
P1.0/TA0.1/DMAE0/RTCCLK/A0/C0/VREF-/VeREF-
P1.1/TA0.2/TA1CLK/COUT/A1/C1/VREF+/VeREF+
P1.2/TA1.1/TA0CLK/COUT/A2/C2
P3.0/A12/C12
P3.1/A13/C13
P3.2/A14/C14
P3.3/A15/C15
P4.7
P1.3/TA1.2/UCB0STE/A3/C3
P1.4/TB0.1/UCA0STE/A4/C4
P1.5/TB0.2/UCA0CLK/A5/C5
PJ.0/TDO/TB0OUTH/SMCLK/SRSCG1/C6
48 47 46 45 44 43 42 41 40 39 38 37
1
36
2
35
3
34
4
33
5
32
6
31
7
30
8
29
9
28
10
27
11
26
12
25
13 14 15 16 17 18 19 20 21 22 23 24
DVSS
P4.6
P4.5
P4.4/TB0.5
P1.7/TB0.4/UCB0SOMI/UCB0SCL/TA1.0
P1.6/TB0.3/UCB0SIMO/UCB0SDA/TA0.0
P3.7/TB0.6
P3.6/TB0.5
P3.5/TB0.4/COUT
P3.4/TB0.3/SMCLK
P2.2/TB0.2/UCB0CLK
P2.1/TB0.0/UCA0RXD/UCA0SOMI/TB0.0
NOTE: QFN package pad connection to V_SS recommended.
On devices with UART BSL: P2.0: BSLTX; P2.1: BSLRX
On devices with I2C BSL: P1.6: BSLSDA; P1.7: BSLSCL
Figure 4-1. 48-Pin RGZ Package (Top View) – MSP430FR596x and MSP430FR596x1
6
Terminal Configuration and Functions
Copyright © 2012–2014, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: MSP430FR5969 MSP430FR59691 MSP430FR5968 MSP430FR5967 MSP430FR5959
MSP430FR5958 MSP430FR5957 MSP430FR5949 MSP430FR5948 MSP430FR5947 MSP430FR59471