MSP430FR59691 Datasheet, PDF (23/131 Pages) Texas Instruments – MSP430FR59xx Mixed-Signal Microcontrollers

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MSP430FR5969, MSP430FR59691, MSP430FR5968, MSP430FR5967
MSP430FR5959, MSP430FR5958, MSP430FR5957
MSP430FR5949, MSP430FR5948, MSP430FR5947, MSP430FR59471
SLAS704C – OCTOBER 2012 – REVISED JUNE 2014
5.10 Typical Characteristics, Current Consumption per Module⁽¹⁾
MODULE
Timer_A
Timer_B
eUSCI_A
eUSCI_A
eUSCI_B
eUSCI_B
RTC_B
MPY
AES
CRC
TEST CONDITIONS
UART mode
SPI mode
SPI mode
I²C mode, 100 kbaud
Only from start to end of operation
Only from start to end of operation
Only from start to end of operation
REFERENCE CLOCK
Module input clock
Module input clock
Module input clock
Module input clock
Module input clock
Module input clock
32 kHz
MCLK
MCLK
MCLK
(1) For other module currents not listed here, refer to the module specific parameter sections.
MIN TYP MAX UNIT
3
μA/MHz
5
μA/MHz
5.5
μA/MHz
3.5
μA/MHz
3.5
μA/MHz
3.5
μA/MHz
100
nA
25
μA/MHz
21
μA/MHz
2.5
μA/MHz
5.11 Thermal Packaging Characteristics
PARAMETER
θ_JA
θ_JC(TOP)
θ_JB
Ψ_JB
Ψ_JT
θ_JC(BOTTOM)
PARAMETER
Junction-to-ambient thermal resistance, still air⁽¹⁾
Junction-to-case (top) thermal resistance⁽²⁾
Junction-to-board thermal resistance⁽³⁾
Junction-to-board thermal characterization parameter
Junction-to-top thermal characterization parameter
Junction-to-case (bottom) thermal resistance⁽⁴⁾
PACKAGE
QFN-48 (RGZ)
VALUE
30.6
17.2
7.2
7.2
0.2
1.2
UNIT
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
θ_JA
θ_JC(TOP)
θ_JB
Ψ_JB
Ψ_JT
θ_JC(BOTTOM)
Junction-to-ambient thermal resistance, still air⁽¹⁾
Junction-to-case (top) thermal resistance⁽²⁾
Junction-to-board thermal resistance⁽³⁾
Junction-to-board thermal characterization parameter
Junction-to-top thermal characterization parameter
Junction-to-case (bottom) thermal resistance⁽⁴⁾
QFN-40 (RHA)
30.1
°C/W
18.7
°C/W
6.4
°C/W
6.3
°C/W
0.3
°C/W
1.5
°C/W
θ_JA
θ_JC(TOP)
θ_JB
Ψ_JB
Ψ_JT
θ_JC(BOTTOM)
Junction-to-ambient thermal resistance, still air⁽¹⁾
Junction-to-case (top) thermal resistance⁽²⁾
Junction-to-board thermal resistance⁽³⁾
Junction-to-board thermal characterization parameter
Junction-to-top thermal characterization parameter
Junction-to-case (bottom) thermal resistance⁽⁴⁾
TSSOP-38 (DA)
65.5
°C/W
12.5
°C/W
32.3
°C/W
31.8
°C/W
0.3
°C/W
N/A
°C/W
(1) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, High-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(2) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(3) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(4) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
Copyright © 2012–2014, Texas Instruments Incorporated
Specifications
23
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