TM4C1237H6PGE Datasheet, PDF (593/1311 Pages) Texas Instruments – The revision history table notes changes made between the indicated revisions of the

Tiva^™ TM4C1237H6PGE Microcontroller _{(identical to LM4F132H5QD)}
Register 1: DMA Channel Source Address End Pointer (DMASRCENDP), offset
0x000
DMA Channel Source Address End Pointer (DMASRCENDP) is part of the Channel Control
Structure and is used to specify the source address for a μDMA transfer.
The μDMA controller can transfer data to and from the on-chip SRAM. However, because the Flash
memory and ROM are located on a separate internal bus, it is not possible to transfer data to/from
the Flash memory or ROM with the μDMA controller.
Note: The offset specified is from the base address of the control structure in system memory,
not the μDMA module base address.
DMA Channel Source Address End Pointer (DMASRCENDP)
Base n/a
Offset 0x000
Type R/W, reset -
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
ADDR
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ADDR
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Bit/Field
31:0
Name
ADDR
Type
R/W
Reset
-
Description
Source Address End Pointer
This field points to the last address of the μDMA transfer source
(inclusive). If the source address is not incrementing (the SRCINC field
in the DMACHCTL register is 0x3), then this field points at the source
location itself (such as a peripheral data register).
July 17, 2013
593
Texas Instruments-Production Data