LM3S1439_16 Datasheet, PDF (534/699 Pages) Texas Instruments – Stellaris LM3S1439 Microcontroller

Inter-Integrated Circuit (I²C) Interface
Register 9: I²C Master Configuration (I2CMCR), offset 0x020
This register configures the mode (Master or Slave) and sets the interface for test mode loopback.
I2C Master Configuration (I2CMCR)
I2C 0 base: 0x4002.0000
Offset 0x020
Type R/W, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
SFE
MFE
reserved
LPBK
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
RO
RO
RO
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:6
5
4
3:1
0
Name
reserved
SFE
MFE
reserved
LPBK
Type
RO
R/W
R/W
RO
R/W
Reset
0x00
0
0
0x00
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
I²C Slave Function Enable
This bit specifies whether the interface may operate in Slave mode. If
set, Slave mode is enabled; otherwise, Slave mode is disabled.
I²C Master Function Enable
This bit specifies whether the interface may operate in Master mode. If
set, Master mode is enabled; otherwise, Master mode is disabled and
the interface clock is disabled.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
I²C Loopback
This bit specifies whether the interface is operating normally or in
Loopback mode. If set, the device is put in a test mode loopback
configuration; otherwise, the device operates normally.
534
July 15, 2014
Texas Instruments-Production Data