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LM3S1439_16 Datasheet, PDF (27/699 Pages) Texas Instruments – Stellaris LM3S1439 Microcontroller | |||
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Stellaris® LM3S1439 Microcontroller
Table 1. Revision History (continued)
Date
January 2010
Revision Description
6712 â In "System Control" section, clarified Debug Access Port operation after Sleep modes.
â Clarified wording on Flash memory access errors.
â Added section on Flash interrupts.
â Changed the reset value of the ADC Sample Sequence Result FIFO n (ADCSSFIFOn) registers
to be indeterminate.
â Clarified operation of SSI transmit FIFO.
â Made these changes to the Operating Characteristics chapter:
â Added storage temperature ratings to "Temperature Characteristics" table
â Added "ESD Absolute Maximum Ratings" table
â Made these changes to the Electrical Characteristics chapter:
â In "Flash Memory Characteristics" table, corrected Mass erase time
â Added sleep and deep-sleep wake-up times ("Sleep Modes AC Characteristics" table)
â In "Reset Characteristics" table, corrected units for supply voltage (VDD) rise time
October 2009
6462
â Deleted MAXADCSPD bit field from DCGC0 register as it is not applicable in Deep-Sleep mode.
â Removed erroneous reference to the WRC bit in the Hibernation chapter.
â Deleted reset value for 16-bit mode from GPTMTAILR, GPTMTAMATCHR, and GPTMTAR registers
because the module resets in 32-bit mode.
â Clarified PWM source for ADC triggering.
â Made these changes to the Electrical Characteristics chapter:
â Removed VSIH and VSIL parameters from Operating Conditions table.
â Added table showing actual PLL frequency depending on input crystal.
â Changed the name of the tHIB_REG_WRITE parameter to tHIB_REG_ACCESS.
â Revised ADC electrical specifications to clarify, including reorganizing and adding new data.
â Changed SSI set up and hold times to be expressed in system clocks, not ns.
July 2009
July 2009
5920
5902
Corrected ordering numbers.
â Clarified Power-on reset and RST pin operation; added new diagrams.
â Corrected the reset value of the Hibernation Data (HIBDATA) and Hibernation Control (HIBCTL)
registers.
â Clarified explanation of nonvolatile register programming in Internal Memory chapter.
â Added explanation of reset value to FMPRE0/1/2/3, FMPPE0/1/2/3, USER_DBG, and USER_REG0/1
registers.
â Changed buffer type for WAKE pin to TTL and HIB pin to OD.
â In ADC characteristics table, changed Max value for GAIN parameter from ±1 to ±3 and added EIR
(Internal voltage reference error) parameter.
â Additional minor data sheet clarifications and corrections.
July 15, 2014
27
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