OMAP3530_15 Datasheet, PDF (51/265 Pages) Texas Instruments – OMAP3530 and OMAP3525 Applications Processors

OMAP3530, OMAP3525
www.ti.com
SPRS507H – FEBRUARY 2008 – REVISED OCTOBER 2013
Table 2-2. Ball Characteristics (CBC Pkg.)⁽¹⁾ (continued)
BALL
BALL TOP PIN NAME
BOTTOM [1]
[2]
[3]
MODE [4]
D2
NA
gpmc_a10
0
sys_ndmareq
1
3
gpio_43
4
safe_mode
7
N1
L1
gpmc_clk
0
gpio_59
4
safe_mode
7
AA2
U2
gpmc_d0
0
AA1
U1
gpmc_d1
0
AC2
V2
gpmc_d2
0
AC1
V1
gpmc_d3
0
AE5
AA3
gpmc_d4
0
AD6
AA4
gpmc_d5
0
AD5
Y3
gpmc_d6
0
AC5
Y4
gpmc_d7
0
V1
R1
gpmc_d8
0
gpio_44
4
safe_mode
7
Y1
T1
gpmc_d9
0
gpio_45
4
safe_mode
7
T1
N1
gpmc_d10
0
gpio_46
4
safe_mode
7
U2
P2
gpmc_d11
0
gpio_47
4
safe_mode
7
U1
P1
gpmc_d12
0
gpio_48
4
safe_mode
7
P1
M1
gpmc_d13
0
gpio_49
4
safe_mode
7
L2
J2
gpmc_d14
0
gpio_50
4
safe_mode
7
M2
K2
gpmc_d15
0
AD10
gpio_51
4
safe_mode
7
AA9
gpmc_nadv_
0
ale
TYPE [5]
O
I
IO
-
O
IO
-
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
-
IO
IO
-
IO
IO
-
IO
IO
-
IO
IO
-
IO
IO
-
IO
IO
-
IO
IO
-
O
BALL
RESET
STATE [6]
BALL
RESET REL.
STATE [7]
RESET REL.
MODE [8]
POWER [9]
H
H
7
vdds
HYS [10]
Yes
BUFFER
STRENG TH
(mA) [11]
4 ⁽⁴⁾
PULLUP
/DOWN
TYPE [12]
PU100/
PD100
IO CELL [13]
LVCMOS
L
0
0
vdds
Yes
4 ⁽⁴⁾
PU100/
LVCMOS
PD100
H
H
0
vdds
Yes
4 ⁽⁴⁾
PU100/
LVCMOS
PD100
H
H
0
vdds
Yes
4 ⁽⁴⁾
PU100/
LVCMOS
PD100
H
H
0
vdds
Yes
4 ⁽⁴⁾
PU100/
LVCMOS
PD100
H
H
0
vdds
Yes
4 ⁽⁴⁾
PU100/
LVCMOS
PD100
H
H
0
vdds
Yes
4 ⁽⁴⁾
PU100/
LVCMOS
PD100
H
H
0
vdds
Yes
4 ⁽⁵⁾
PU100/
LVCMOS
PD100
H
H
0
vdds
Yes
4 ⁽⁵⁾
PU100/
LVCMOS
PD100
H
H
0
vdds
Yes
4 ⁽⁵⁾
PU100/
LVCMOS
PD100
H
H
0
vdds
Yes
4 ⁽⁵⁾
PU100/
LVCMOS
PD100
H
H
0
vdds
Yes
4 ⁽⁵⁾
PU100/
LVCMOS
PD100
H
H
0
vdds
Yes
4 ⁽⁵⁾
PU100/
LVCMOS
PD100
H
H
0
vdds
Yes
4 ⁽⁵⁾
PU100/
LVCMOS
PD100
H
H
0
vdds
Yes
4 ⁽⁵⁾
PU100/
LVCMOS
PD100
H
H
0
vdds
Yes
4 ⁽⁵⁾
PU100/
LVCMOS
PD100
H
H
0
vdds
Yes
4 ⁽⁵⁾
PU100/
LVCMOS
PD100
H
H
0
vdds
Yes
4 ⁽⁵⁾
PU100/
LVCMOS
PD100
0
0
0
vdds
No
4 ⁽⁵⁾
NA
LVCMOS
(5) The drive strength is programmable vs the capacity load: load range = [2 pF to 6 pF] per default or [6 pF to 12 pF] according to the
selected mode.
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