MSP430F5529_17 Datasheet, PDF(50/128 Page) Texas Instruments

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

MSP430F5529_17 Datasheet, PDF (50/128 Pages) Texas Instruments – Mixed-Signal Microcontrollers

◁

MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526

MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521

MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513

SLAS590M â MARCH 2009 â REVISED NOVEMBER 2015

www.ti.com

6 Detailed Description

6.1 CPU (Link to User's Guide)

The MSP430 CPU has a 16-bit RISC architecture that is highly transparent to the application. All

operations, other than program-flow instructions, are performed as register operations in conjunction with

seven addressing modes for source operand and four addressing modes for destination operand.

The CPU is integrated with 16 registers that provide reduced instruction execution time. The register-to-

Four of the registers, R0 to R3, are dedicated as program counter, stack pointer, status register, and

constant generator, respectively. The remaining registers are general-purpose registers.

Peripherals are connected to the CPU using data, address, and control buses, and can be handled with all

instructions.

The instruction set consists of the original 51 instructions with three formats and seven address modes

and additional instructions for the expanded address range. Each instruction can operate on word and

byte data.

Program Counter

Stack Pointer

Status Register

Constant Generator

General-Purpose Register

PC/R0

SP/R1

SR/CG1/R2

CG2/R3

R10

R11

R12

R13

R14

R15

Detailed Description

Submit Documentation Feedback

Product Folder Links: MSP430F5529 MSP430F5528 MSP430F5527 MSP430F5526 MSP430F5525 MSP430F5524

MSP430F5522 MSP430F5521 MSP430F5519 MSP430F5517 MSP430F5515 MSP430F5514 MSP430F5513

▷