SM73201 Datasheet, PDF (5/21 Pages) Texas Instruments – 16-Bit, 50 to 250 kSPS, Differential Input, MicroPower ADC

Symbol
Parameter
Conditions
Min
Typ
Max Units
Power Consumption, Power Down
PWR (PD) _{Mode (CS high)}
f_SCLK = 5 MHz, V_A = 5.0V
(Note 8)
f_SCLK = 0 Hz, V_A = 5.0V
(Note 8)
35
µW
10
15
µW
See the Specification Definitions for
PSRR Power Supply Rejection Ratio
the test condition
−78
dB
AC ELECTRICAL CHARACTERISTICS
f_SCLK
f_S
t_ACQ
t_CONV
Maximum Clock Frequency
Maximum Sample Rate
Acquisition/Track Time
Conversion/Hold Time
(Note 10)
1
5
MHz
50
250
kSPS
600
ns
17
SCLK
cycles
t_AD
Aperture Delay
See the Specification Definitions
6
ns
SM73201 Timing Specifications (Note 7)
The following specifications apply for V_A = 4.5V to 5.5V, V_IO = 2.7V to 5.5V, V_REF = 2.5V to 5.5V, f_SCLK = 1Mz to 5MHz, and C_L =
25 pF, unless otherwise noted. Maximum and minimum values apply for T_A = T_MIN to T_MAX; the typical values apply for T_A = 25°C.
Symbol
Parameter
Min
Typ
Max
Units
t_CSS CS Setup Time prior to an SCLK rising edge
t_CSH CS Hold Time after an SCLK rising edge
t_DH D_OUT Hold Time after an SCLK falling edge
t_DA D_OUT Access Time after an SCLK falling edge
t_DIS D_OUT Disable Time after the rising edge of CS (Note 11)
t_CS Minimum CS Pulse Width
t_EN D_OUT Enable Time after the 2nd falling edge of SCLK
t_CH SCLK High Time
t_CL SCLK Low Time
t_r
D_OUT Rise Time
t_f
D_OUT Fall Time
8
3
ns
8
3
6
11
ns
18
41
ns
20
30
ns
20
ns
20
70
ns
20
ns
20
ns
7
ns
7
ns
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions. Operation of the device beyond the maximum Operating Ratings is not recommended.
Note 2: All voltages are measured with respect to GND = 0V, unless otherwise specified.
Note 3: When the input voltage at any pin exceeds the power supplies (that is, V_IN < GND or V_IN > V_A), the current at that pin should be limited to 10 mA. The 50
mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 10 mA to five.
Note 4: The absolute maximum junction temperature (T_Jmax) for this device is 150°C. The maximum allowable power dissipation is dictated by T_Jmax, the
junction-to-ambient thermal resistance (θ_JA), and the ambient temperature (T_A), and can be calculated using the formula P_DMAX = (T_Jmax − T_A)/θ_JA. The values
for maximum power dissipation listed above will be reached only when the SM73201 is operated in a severe fault condition (e.g. when input or output pins are
driven beyond the power supply voltages, or the power supply polarity is reversed). Such conditions should always be avoided.
Note 5: Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor. Machine model is a 220 pF capacitor discharged through 0 Ω. Charge
device model simulates a pin slowly acquiring charge (such as from a device sliding down the feeder in an automated assembler) then rapidly being discharged.
Note 6: Reflow temperature profiles are different for lead-free packages.
Note 7: Typical values are at T_J = 25°C and represent most likely parametric norms. Test limits are guaranteed to National's AOQL (Average Outgoing Quality
Level).
Note 8: This parameter is guaranteed by design and/or characterization and is not tested in production.
Note 9: The value of V_IO is independent of the value of V_A. For example, V_IO could be operating at 5.5V while V_A is operating at 4.5V or V_IO could be operating
at 2.7V while V_A is operating at 5.5V.
Note 10: While the maximum sample rate is f_SCLK / 20, the actual sample rate may be lower than this by having the CS rate slower than f_SCLK / 20.
Note 11: t_DIS is the time for D_OUT to change 10% while being loaded by the Timing Test Circuit.
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