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SM73201 Datasheet, PDF (17/21 Pages) Texas Instruments – 16-Bit, 50 to 250 kSPS, Differential Input, MicroPower ADC
erence families and the SM74601, LM4120, and LM4140
series reference families are excellent choices for a reference
source.
6.3 PCB Layout
Capacitive coupling between the noisy digital circuitry and the
sensitive analog circuitry can lead to poor performance. The
solution is to keep the analog circuitry separated from the
digital circuitry and the clock line as short as possible. Digital
circuits create substantial supply and ground current tran-
sients. The logic noise generated could have significant im-
pact upon system noise performance. To avoid performance
degradation of the SM73201 due to supply noise, avoid using
the same supply for the VA and VREF of the SM73201 that is
used for digital circuitry on the board.
Generally, analog and digital lines should cross each other at
90° to avoid crosstalk. However, to maximize accuracy in high
resolution systems, avoid crossing analog and digital lines al-
together. It is important to keep clock lines as short as possi-
ble and isolated from ALL other lines, including other digital
lines. In addition, the clock line should also be treated as a
transmission line and be properly terminated. The analog in-
put should be isolated from noisy signal traces to avoid cou-
pling of spurious signals into the input. Any external
component (e.g., a filter capacitor) connected between the
converter's input pins and ground or to the reference input pin
and ground should be connected to a very clean point in the
ground plane.
A single, uniform ground plane and the use of split power
planes are recommended. The power planes should be lo-
cated within the same board layer. All analog circuitry (input
amplifiers, filters, reference components, etc.) should be
placed over the analog power plane. All digital circuitry should
be placed over the digital power plane. Furthermore, the GND
pins on the SM73201 and all the components in the reference
circuitry and input signal chain that are connected to ground
should be connected to the ground plane at a quiet point.
Avoid connecting these points too close to the ground point
of a microprocessor, microcontroller, digital signal processor,
or other high power digital device.
7.0 APPLICATION CIRCUITS
The following figures are examples of the SM73201 in typical
application circuits. These circuits are basic and will generally
require modification for specific circumstances.
7.1 Data Acquisition
Figure 15 shows a typical connection diagram for the
SM73201 operating at VA of +5V. VREF is connected to a 2.5V
shunt reference, the LM4020-2.5, to define the analog input
range of the SM73201 independent of supply variation on the
+5V supply line. The VREF pin should be de-coupled to the
ground plane by a 0.1 µF ceramic capacitor and a tantalum
capacitor of 10 µF. It is important that the 0.1 µF capacitor be
placed as close as possible to the VREF pin while the place-
ment of the tantalum capacitor is less critical. It is also rec-
ommended that the VA and VIO pins of the SM73201 be de-
coupled to ground by a 0.1 µF ceramic capacitor in parallel
with a 10 µF tantalum capacitor.
FIGURE 15. Low cost, low power Data Acquisition System
30155463
17
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