DS90CR287MTDX Datasheet, PDF (5/24 Pages) Texas Instruments – DS90CR287/DS90CR288A +3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link - 85MHz

DS90CR287, DS90CR288A
www.ti.com
SNLS056G – OCTOBER 1999 – REVISED MARCH 2013
Transmitter Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified
Symbol
Parameter
LLHT
LVDS Low-to-High Transition Time Figure 7
LHLT
LVDS High-to-Low Transition Time Figure 7
TCIT
TxCLK IN Transition Time Figure 9
TPPos0
Transmitter Output Pulse Position for Bit0 Figure 19
f = 85 MHz
TPPos1
Transmitter Output Pulse Position for Bit1
TPPos2
Transmitter Output Pulse Position for Bit2
TPPos3
Transmitter Output Pulse Position for Bit3
TPPos4
Transmitter Output Pulse Position for Bit4
TPPos5
Transmitter Output Pulse Position for Bit5
TPPos6
Transmitter Output Pulse Position for Bit6
TCIP
TxCLK IN Period Figure 10
TCIH
TxCLK IN High Time Figure 10
TCIL
TxCLK IN Low Time Figure 10
TSTC
TxIN Setup to TxCLK IN Figure 10
f = 85 MHz
THTC
TxIN Hold to TxCLK IN Figure 10
TCCD
TPLLS
TxCLK IN to TxCLK OUT Delay Figure 12
Transmitter Phase Lock Loop Set Figure 14
T_A = 25°C, V_CC = 3.3V
TPDD
Transmitter Powerdown Delay Figure 17
TJIT
TxCLK IN Cycle-to-Cycle Jitter (Input clock requirement)
(1) Typical values are given for V_CC = 3.3V and T_A = +25°C.
Min
1.0
−0.20
1.48
3.16
4.84
6.52
8.20
9.88
11.76
0.35T
0.35T
2.5
0
3.8
Typ ⁽¹⁾
0.75
0.75
0
1.68
3.36
5.04
6.72
8.40
10.08
T
0.5T
0.5T
Max
1.5
1.5
6.0
0.20
1.88
3.56
5.24
6.92
8.60
10.28
50
0.65T
0.65T
6.3
10
100
2
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
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