DRV110_15 Datasheet, PDF (5/24 Pages) Texas Instruments – Power-Saving Solenoid Controller

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DRV110
SLVSBA8B – MARCH 2012 – REVISED JULY 2015
6.5 Electrical Characteristics
V_IN = 14 V, T_A = –40°C to 105°C, over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
SUPPLY
Standby current
Quiescent current
I_Q
Internally regulated supply
GATE DRIVER
EN = 0, V_IN = 14 V, bypass deactivated
EN = 1, V_IN = 14 V, bypass deactivated
EN = 0, I_VIN = 2 mA, bypass activated
EN = 1, I_VIN = 2 mA, bypass activated
200
360
10.5
15
14.5
15
V_DRV
I_{DRV_SINK}
I_{DRV_SOURCE}
f_PWM
D_MAX
D_MIN
Gate drive voltage
Gate drive sink current
Gate drive source current
PWM clock frequency
Maximum PWM duty cycle
Minimum PWM duty cycle
t_D
Start-up delay
CURRENT CONTROLLER, INTERNAL SETTINGS
Supply voltage in regulation (I_VIN > 1 mA)
V_OUT = 15 V; V_IN = 15 V
V_OUT = GND; V_IN = 15 V
OSC = GND
Delay between EN going high until gate driver
starts switching, f_PWM = 20 kHz
V_IN
8
15
–15
15
20
100%
7.5%
I_PEAK
Peak current
I_HOLD
Hold current
CURRENT CONTROLLER, EXTERNAL SETTINGS
R_SENSE = 1 Ω, PEAK = GND
R_SENSE = 1 Ω, HOLD = GND
270
300
40
50
t_KEEP
Externally set keep time at peak current C_KEEP = 1 µF
100
V_PEAK
Externally set V_PEAK
R_PEAK = 50 kΩ
R_PEAK = 200 kΩ
900
300
V_HOLD
Externally set V_HOLD
R_HOLD = 50 kΩ
R_HOLD = 200 kΩ
150
50
f_PWM
Externally set PWM clock frequency
R_OSC = 50 kΩ
R_OSC = 200 kΩ
60
20
LOGIC INPUT LEVELS (EN)
V_IL
Input low level
V_IH
Input high level
R_EN
Input pullup resistance
LOGIC OUTPUT LEVELS (STATUS)
1.65
350
500
V_OL
Output low level
I_IL
Output leakage current
UNDERVOLTAGE LOCKOUT
Pulldown activated, I_STATUS = 2 mA
Pulldown deactivated, V(STATUS) = 5 V
V_UVLO
Undervoltage lockout threshold
4.6
THERMAL SHUTDOWN
T_TSU
Junction temperature start-up threshold
140
T_TSD
Junction temperature shutdown
threshold
160
MAX UNIT
250
µA
570
19
V
15.5
V
mA
–10 mA
27 kHz
50
µs
330 mA
65 mA
ms
mV
mV
kHz
1.3
V
V
kΩ
0.3
V
2
µA
V
°C
°C
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