TMS320VC5509A_17 Datasheet, PDF (46/145 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

Functional Overview
3.6 General-Purpose Input/Output (GPIO) Ports
3.6.1 Dedicated General-Purpose I/O
The 5509A provides eight dedicated general-purpose input/output pins, GPIO0−GPIO7. Each pin can be
indepedently configured as an input or an output using the I/O Direction Register (IODIR). The I/O Data
Register (IODATA) is used to monitor the logic state of pins configured as inputs and control the logic state
of pins configured as outputs. See Table 3−31 for address information. The description of the IODIR is shown
in Figure 3−8 and Table 3−9. The description of IODATA is shown in Figure 3−9 and Table 3−10.
To configure a GPIO pin as an input, clear the direction bit that corresponds to the pin in IODIR to 0. To read
the logic state of the input pin, read the corresponding bit in IODATA.
To configure a GPIO pin as an output, set the direction bit that corresponds to the pin in IODIR to 1. To control
the logic state of the output pin, write to the corresponding bit in IODATA.
15
8
7
6
Reserved
IO7DIR IO6DIR
R−00000000
R/W−0
R/W−0
LEGEND: R = Read, W = Write, n = value after reset
5
IO5DIR
(BGA)
R/W−0
4
IO4DIR
R/W−0
3
IO3DIR
R/W−0
2
IO2DIR
R/W−0
Figure 3−8. I/O Direction Register (IODIR) Bit Layout
1
IO1DIR
R/W−0
0
IO0DIR
R/W−0
Table 3−9. I/O Direction Register (IODIR) Bit Functions
BIT
BIT
RESET
NO.
NAME
VALUE
FUNCTION
15−8 Reserved
7−0 IOxDIR†
0
These bits are reserved and are unaffected by writes.
IOx Direction Control Bit. Controls whether IOx operates as an input or an output.
0
IOxDIR = 0 IOx is configured as an input.
IOxDIR = 1 IOx is configured as an output.
† _{The GPIO5 pin is available on the BGA package only.}
46 SPRS205K
November 2002 − Revised January 2008