CC2500RGPR Datasheet, PDF (46/99 Pages) Texas Instruments – Low-Cost Low-Power 2.4 GHz RF Transceiver

CC2500
23 Voltage Regulators
CC2500 contains several on-chip linear voltage
regulators, which generate the supply voltage
needed by low-voltage modules. These
voltage regulators are invisible to the user, and
can be viewed as integral parts of the various
modules. The user must however make sure
that the absolute maximum ratings and
required pin voltages in Table 1 and Table 13
are not exceeded. The voltage regulator for
the digital core requires one external
decoupling capacitor.
Setting the CSn pin low turns on the voltage
regulator to the digital core and starts the
crystal oscillator. The SO pin on the SPI
interface must go low before the first positive
edge of SCLK (setup time is given in Table
16).
If the chip is programmed to enter power-down
mode, (SPWD strobe issued), the power will be
turned off after CSn goes high. The power and
crystal oscillator will be turned on again when
CSn goes low.
The voltage regulator output should only be
used for driving the CC2500.
24 Output Power Programming
The RF output power level from the device has
two levels of programmability, as illustrated in
Figure 21.
The RF output power level from the device is
programmed through the PATABLE register.
 If 2-FSK, GFSK or MSK modulation is
used the desired output power is
programmed to index 0 in the PATABLE
register (PATABLE(0)[7:0]). The 3-bit
FREND0.PA_POWER value shall be set to 0
(reset default value).
 If OOK modulation is used the desired
output power for the logic 0 and logic 1
power levels are programmed to index 0
and index 1 in the PATABLE register
respectively (PATABLE(0)[7:0] and
PATABLE(1)[7:0]).
The
3-bit
FREND0.PA_POWER value shall be set to
1.
Table 31 contains recommended PATABLE
settings for various output levels and
frequency bands. See Section 10.6 on page
24 for PATABLE programming details. The
SmartRF^ Studio software [5] should be used
to obtain optimum PATABLE settings for
various output powers.
PATABLE must be programmed in burst mode
if writing to other entries than PATABLE(0)
(OOK modulation). Note that all content of the
PATABLE, except for the first byte (index 0) is
lost when entering the SLEEP state.
SWRS040C
Page 46 of 89