LMK00301 Datasheet, PDF (4/26 Pages) Texas Instruments – 3-GHz, 10-Output Differential Fanout Buffer / Level Translator

6.0 Pin Descriptions
Pin #
DAP
1, 2
3, 4
5, 8, 29, 32,
45
Pin Name(s)
DAP
CLKoutA0, CLKoutA0*
CLKoutA1, CLKoutA1*
Vcco
6, 7
9, 10
11, 12
13, 18, 24,
37, 43, 48
14, 47
15, 42
CLKoutA2, CLKoutA2*
CLKoutA3, CLKoutA3*
CLKoutA4, CLKoutA4*
GND
CLKoutA_TYPE0,
CLKoutA_TYPE1
Vcc
16
OSCin
17
19, 22
20, 21
23, 39
25, 26
27, 28
30, 31
33, 34
35, 36
OSCout
CLKin_SEL0, CLKin_SEL1
CLKin0, CLKin0*
CLKoutB_TYPE0,
CLKoutB_TYPE1
CLKoutB4*, CLKoutB0
CLKoutB3*, CLKoutB3
CLKoutB2*, CLKoutB2
CLKoutB1*, CLKoutB1
CLKoutB0*, CLKoutB0
38
NC
40, 41
44
46
CLKin1*, CLKin1
REFout
REFout_EN
Type
GND
O
O
PWR
O
O
O
Description
Die Attach Pad. Connect to the PCB ground plane for heat dissipation.
Differential clock output A0. Output type set by CLKoutA_TYPE pins.
Differential clock output A1. Output type set by CLKoutA_TYPE pins.
Power supply for Output buffers (Output banks A & B, REFout). The Vcco
supply operates from 3.3 V or 2.5 V. Bypass with a 0.1 uF low-ESR
capacitor placed very close to each Vcco pin.
Differential clock output A2. Output type set by CLKoutA_TYPE pins.
Differential clock output A3. Output type set by CLKoutA_TYPE pins.
Differential clock output A4. Output type set by CLKoutA_TYPE pins.
GND Ground
I Bank A output buffer type selection pins (Note 1)
PWR
I
O
I
I
Power supply for Core blocks. The Vcc supply operates from 3.3 V. Bypass
with a 0.1 uF low-ESR capacitor placed very close to each Vcc pin.
Input for crystal. Can also be driven by a XO, TCXO, or other external
single-ended clock.
Output for crystal. Leave OSCout floating if OSCin is driven by a single-
ended clock.
Clock input selection pins (Note 1)
Differential clock input 0
I Bank B output buffer type selection pins (Note 1)
O Differential clock output B4. Output type set by CLKoutB_TYPE pins.
O Differential clock output B3. Output type set by CLKoutB_TYPE pins.
O Differential clock output B2. Output type set by CLKoutB_TYPE pins.
O Differential clock output B1. Output type set by CLKoutB_TYPE pins.
O Differential clock output B0. Output type set by CLKoutB_TYPE pins.
Not connected internally. Pin may be floated, grounded, or otherwise tied
— to any potential within the Supply Voltage range stated in the device's
Absolute Maximum Ratings.
I Differential clock input 1
O LVCMOS reference output. Enable output by pulling REFout_EN pin high.
I
REFout enable input. Enable signal is internally synchronized to selected
clock input. (Note 1)
Note 1: CMOS control input with internal pull-down resistor.
Note 2: Unused output pins should be left floating, or properly terminated, or disabled. See Section 14.3 Termination and Use of Clock Drivers for more information
on output interface and termination techniques.
3
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