LM3560 Datasheet, PDF(39/42 Page) Texas Instruments – LM3560 Synchronous Boost Flash Driver w/ Dual 1A High-Side Current Sources (2A Total Flash Current)

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

LM3560 Datasheet, PDF (39/42 Pages) Texas Instruments – LM3560 Synchronous Boost Flash Driver w/ Dual 1A High-Side Current Sources (2A Total Flash Current)

◁

Layout Recommendations

The high switching frequency and large switching currents of

the LM3560 make the choice of layout important. The follow-

ing steps should be used as a reference to ensure the device

is stable and maintains proper LED current regulation across

its intended operating voltage and current range.

1. Place CIN on the top layer (same layer as the LM3560)

and as close to the device as possible. The input

capacitor conducts the driver currents during the low side

MOSFET turn-on and turn-off and can see current spikes

over 1A in amplitude. Connecting the input capacitor

through short wide traces to both the IN and GND

terminals will reduce the inductive voltage spikes that

occur during switching and which can corrupt the VIN line.

2. Place COUT on the top layer (same layer as the LM3560)

and as close as possible to the OUT and GND terminal.

The returns for both CIN and COUT should come together

at one point, and as close to the GND pin as possible.

Connecting COUT through short wide traces will reduce

the series inductance on the OUT and GND terminals

that can corrupt the VOUT and GND line and cause

excessive noise in the device and surrounding circuitry.

3. Connect the inductor on the top layer close to the SW pin.

There should be a low-impedance connection from the

inductor to SW due to the large DC inductor current, and

at the same time the area occupied by the SW node

should be small so as to reduce the capacitive coupling

of the high dV/dt present at SW that can couple into

nearby traces.

4. Avoid routing logic traces near the SW node so as to

avoid any capacitively coupled voltages from SW onto

any high-impedance logic lines such as TX1/TORCH/

GPIO1, TX2/INT/GPIO2, HWEN, LEDI/NTC (NTC

mode), SDA, and SCL. A good approach is to insert an

inner layer GND plane underneath the SW node and

between any nearby routed traces. This creates a shield

from the electric field generated at SW.

5. Terminate the Flash LED cathodes directly to the GND

pin of the LM3560. If possible, route the LED returns with

a dedicated path so as to keep the high amplitude LED

currents out of the GND plane. For Flash LEDs that are

routed relatively far away from the LM3560, a good

approach is to sandwich the forward and return current

paths over the top of each other on two layers. This will

help in reducing the inductance of the LED current paths.

6. The NTC Thermistor is intended to have its return path

connected to the LEDs cathode. This allows the

thermistor resistive divider voltage (VNTC) to trip the

comparators threshold as VNTC is falling. Additionally, the

thermistor-to-LED cathode junction should be connected

as close as possible in order to reduce the thermal

impedance between the LED and the thermistor. The

drawback is that the thermistor's return will see the

switching currents from the LM3560's boost converter.

Because of this, it is necessary to have a filter capacitor

at the NTC pin which terminates close to the GND of the

LM3560 (see CBYP in Figure 21).

www.national.com

▷