LM3560 Datasheet, PDF (29/42 Pages) Texas Instruments – LM3560 Synchronous Boost Flash Driver w/ Dual 1A High-Side Current Sources (2A Total Flash Current)

GPIO REGISTER (Address 0x20)
The GPIO register contains the control bits which change the
state of the TX1/TORCH/GPIO1 pin and the TX2/INT/GPIO2
pins to general purpose I/O’s (GPIO’s). Additionally, bit 6 of
this register contains the interrupt configuration bit. describes
the bit description and functionality of the GPIO register. To
configure the TX1 or TX2 pins as GPIO outputs an initial dou-
ble write is required to register 0x20. For example, to config-
ure TX2 to output a logic high, an initial write of 0xB8 would
need to occur twice, to force GPIO2 low. Subsequent writes
to GPIO2 after the initial set-up, only requires a single write.
To read back the GPIO inputs, a write then a read of register
0x20 must occur each time the data is read. For example, if
GPIO2 is set-up as a GPIO input and the GPIO2 input has
then changed state, first a write to 0x20 must occur, then the
following readback of register 0x20 will show the updated da-
ta. When configuring TX2 as an interrupt output, the TX2/
GPIO2/INT pin must first be configured as a GPIO output
(double write). For example, to configure TX2/GPIO2/INT for
INT mode a write of 0xF8 to register 0x20 must be done twice.
TABLE 8. GPIO Register
Bit 7
(Not
Used)
N/A
Bit 6
Bit 5
(TX2/INT/GPIO2 (TX2/INT/
Interrupt
GPIO2 data)
Enable)
0 = TX2/INT/
GPIO2 is
This bit is the
read or write
configured
data for the
according to bit 3 TX2/INT/
of this register GPIO2 pin in
(default)
GPIO mode
1 = with bits [4:3]
= 11, TX2/INT/
GPIO2 is an
interrupt output.
See Interrupt
section.
Bit 4
(TX2/INT/
GPIO2 data
direction)
0 = TX2/INT/
GPIO2 is a
GPIO Input
(default)
1 = TX2/INT/
GPIO2 is a
GPIO output
Bit 3
Bit 2
(TX2/INT/GPIO2 (TX1/TORCH/
Control)
GPIO1 data)
0 = TX2/INT/
GPIO is
configured as a
TX interrupt
(default)
This bit is the
read or write
data for the
GPIO1 pin in
GPIO mode
1 = TX2/INT/
GPIO2 is
configured as a
GPIO
Bit 1
Bit 0
(TX1/TORCH/
GPIO1 data
direction)
(TX1/TORCH/
GPIO1
Control)
0 = TX1/
0 = TX1/
TORCH/GPIO1 TORCH/
is a GPIO input GPIO1 pin is
(default)
configured as
TX interrupt
(default)
1 TX1/
1 = TX1/
TORCHGPIO1 TORCH/
is an output GPIO1 pin is
configured as a
GPIO
LED FORWARD VOLTAGE ADC (VLED MONITOR
REGISTER, Address 0x30)
The VLED Monitor Register controls the internal 4 bit analog
to digital converter. Bits [3:0] of this register contain the 4-bit
data of the LED voltage. This data is the digitized voltage of
the highest of either VLED1 to GND or VLED2 to GND. Bit [4]
is the Manual Mode enable which provides for a manual con-
version of the ADC. In Manual Mode the Automatic Conver-
sion is still performed. In automatic conversion mode a
conversion is performed each time a flash pulse is initiated.
Bit [5] is the ADC shutdown bit. Bit [6] signals the end of con-
version. This is a read-only bit that goes high when a conver-
sion is complete and data is ready. A read of the VLED
Monitor Register clears the End of Conversion bit (see Table
9).
TABLE 9. VLED Monitor Register Descriptions
Bit 7
(Not
Used)
N/A
Bit 6
(End of
Conversion)
0 = Conversion
in progress
(default)
1 = Conversion
done
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
(ADC Shutdown) (Manual Mode (ADC3)
(ADC2)
(ADC1)
Enable)
0 = ADC is enabled 0 = Manual
0000 = (VLED < 2.8V) (default)
(default)
Mode Disabled _{0001 = (2.8V ≤ VLED < 2.9V)}
(default)
0010 = (2.9V ≤ VLED < 3.0V)
1 = ADC is shutdown, 1 = Manual
0011 = (3.0V ≤ VLED < 3.1V)
no conversion is
Mode is Enabled _{0100 = (3.1V ≤ VLED < 3.2V)}
performed
0101 = (3.2V ≤ VLED < 3.3V)
0110 = (3.3V ≤ VLED < 3.4V)
0111 = (3.4V ≤ VLED < 3.5V)
1000 = (3.5V ≤ VLED < 3.6V)
1001 = (3.6V ≤ VLED < 3.7V)
1010 = (3.7V ≤ VLED < 3.8V)
1011 = (3.8V ≤ VLED < 3.9V)
1100 = (3.9V ≤ VLED < 4.0V)
1101 = (4.0V ≤ VLED < 4.1V)
1110 = (4.1V ≤ VLED < 4.2V)
1111 = (4.2V ≤ VLED)
Bit 0
(ADC0)
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