TMS320C6452 Datasheet, PDF (37/181 Pages) Texas Instruments – TMS320C6452 Digital Signal Processor

TMS320C6452
www.ti.com
SPRS371F – OCTOBER 2007 – REVISED APRIL 2012
2.7.3 Related Documentation From Texas Instruments
The following documents describe the devices. Copies of these documents are available on the Internet at
www.ti.com. Tip: Enter the literature number in the search box provided at www.ti.com.
The following documents describe the TMS320C6452. Copies of these documents are available on the
Internet at www.ti.com. Enter the literature number in the search box provided at www.ti.com.
CPU
SPRU732
TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide describes the
CPU architecture, pipeline, instruction set, and interrupts for the TMS320C64x and
TMS320C64x+ digital signal processors (DSPs) of the TMS320C6000 DSP family. The
C64x/C64x+ DSP generation comprises fixed-point devices in the C6000 DSP platform.
The C64x+ DSP is an enhancement of the C64x DSP with added functionality and an
expanded instruction set.
Reference Guides
SPRUF85
C6452 DSP DDR2 Memory Controller User's Guide describes the DDR2 memory
controller in the TMS320C6452 Digital Signal Processor (DSP). The DDR2/mDDR
memory controller is used to interface with JESD79D-2A standard compliant DDR2
SDRAM devices and standard Mobile DDR SDRAM devices.
SPRUF86
C6452 Peripheral Component Interconnect (PCI) User's Guide describes the
peripheral component interconnect (PCI) port in the TMS320C6452 Digital Signal
Processor (DSP). The PCI port supports connection of the C642x DSP to a PCI host via
the integrated PCI master/slave bus interface. The PCI port interfaces to the DSP via the
enhanced DMA (EDMA) controller. This architecture allows for both PCI master and slave
transactions, while keeping the EDMA channel resources available for other applications.
SPRUF87
C6452 DSP Host Port Interface (UHPI) User's Guide describes the host port interface
(HPI) in the TMS320C6452 Digital Signal Processor (DSP). The HPI is a parallel port
through which a host processor can directly access the CPU memory space. The host
device functions as a master to the interface, which increases ease of access. The host
and CPU can exchange information via internal or external memory. The host also has
direct access to memory-mapped peripherals. Connectivity to the CPU memory space is
provided through the enhanced direct memory access (EDMA) controller.
SPRUF89
C6452 DSP VLYNQ Port User's Guide describes the VLYNQ port in the TMS320C6452
Digital Signal Processor (DSP). The VLYNQ port is a high-speed point-to-point serial
interface for connecting to host processors and other VLYNQ compatible devices. It is a
full-duplex serial bus where transmit and receive operations occur separately and
simultaneously without interference.
SPRUF90
C6452 DSP 64-Bit Timer User's Guide describes the operation of the 64-bit timer in the
C6452 Digital Signal Processor (DSP). The timer can be configured as a general-purpose
64-bit timer or dual general-purpose 32-bit timers.
SPRUF91
C6452 DSP Multichannel Audio Serial Port (McASP) User's Guide describes the
multichannel audio serial port (McASP) in the C6452 Digital Signal Processor (DSP). The
McASP functions as a general-purpose audio serial port optimized for the needs of
multichannel audio applications. The McASP is useful for time-division multiplexed (TDM)
stream, Inter-Integrated Sound (I2S) protocols, and intercomponent digital audio interface
transmission (DIT).
SPRUF92
C6452 DSP Serial Port Interface (SPI) User's Guide discusses the Serial Port Interface
(SPI) in the C6452 Digital Signal Processor (DSP). This reference guide provides the
specifications for a 16-bit configurable, synchronous serial peripheral interface. The SPI
is a programmable-length shift register, used for high speed communication between
external peripherals or other DSPs.
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