TLC59291_16 Datasheet, PDF (34/46 Pages) Texas Instruments – 8/16-Channel, Constant Current LED Driver

TLC59291
SLVSA96A – SEPTEMBER 2015 – REVISED MARCH 2016
www.ti.com
Figure 35. Control Data Latch
15
14
13
12
11
10
9
8
1
0
0
0
0
1
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7
6
5
4
3
2
1
0
0
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 8. Control Data Latch
Bit Field
[15] PSMODE
[14:13] IDMTIM
[12:11] IDMCUR
[10] LSDVLT
[9]
BLKMS
[8:7] SIDLD
[6:0] BCALL
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
1b
00b
00b
1b
0b
00b
1111111b
Description
Power save mode enable (Default value = ‘1b’)
The data selects power save mode enable or disable. When the
mode is enabled, the device goes into power save mode if all
data in the on/off data latch are “0”. Table 15 shows the power
save mode truth table. Figure 7 shows the power save mode
operation timing.
IDM working time select (Default value = ‘00b’)
The data selects the time of output current sink at OUTn for IDM
to detect LED open detection (LOD) or LSD without visible
lighting. Table 15 shows the work time truth table.Figure 9
shows the IDM operation timing.
IDM current select (Default value = ‘00b’)
The data selects the sink current at OUTn for IDM to detect LED
open detection (LOD) or LSD without visible lighting. Table 14
shows the current value truth table. Figure 9 shows the IDM
operation timing.
LSD detection voltage select. (Default value = ‘1b’)
These two bits select the detection threshold voltage for the LED
short detection (LSD). Table 12 shows the detect voltage truth
table.
BLANK Mode Select (Default value = ‘0b’)
The data selects the working mode for BLANK pin. Table 11
shows the truth table.
SID load control (Default value = ‘00b’)
The data selects the SID data loaded to the common register
when LAT pulse is input for on-off data writing. Table 10 shows
the selected data truth table.
Global brightness control (Default value = ‘1111111b’)
The 7-bit data controls the current of all output with 128 steps
between 0~100% of the maximum current value set by a
external resistor. Table 13 shows the current value truth table.
8.5.1.4 Output On/Off Data Write Timing and Output Control
When SCLK = “0” at LAT rising edge, the output on-off data can be updated with the 16-bit data in the shift
register after the data are stored to the shift register using SIN and SCLK signals. When the on-off data latch is
updated, SID is loaded into the shift register except SID load control is “00b”. See Figure 11.
When BLANK = SOUT mode, the timing is show in Figure 12.
8.5.1.5 Function Control Data Writing
When SCLK = “1” at LAT rising edge, the control data latch can be updated with the 16-bit data in the shift
register after the data are stored to the shift register using SIN and SCLK signals. When the control data latch is
updated, SID is not loaded into the shift register.
If the device is in SOUT mode (FC[9] = 0) and BLANK = Low, SOUT is connected with BIT 7 of common shift
register. Then FC data can’t be input and not valid. See Figure 13
34
Submit Documentation Feedback
Product Folder Links: TLC59291
Copyright © 2015–2016, Texas Instruments Incorporated