TLC59291_16 Datasheet, PDF (28/46 Pages) Texas Instruments – 8/16-Channel, Constant Current LED Driver

TLC59291
SLVSA96A – SEPTEMBER 2015 – REVISED MARCH 2016
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8.4 Device Functional Modes
8.4.1 Blank Mode Selection (BLKMS)
The device has two configuration for BLANK pin, which is decided by BIT[9] in FC register. When BLANK mode
= 1, the device is in ENABLE mode, BLANK pin is worked as OUTPUT enable pin: when BLANK=Low, all
constant current outputs are controlled by the on/off control data in the data latch; when BLANK=High, all OUTx
are forced off.
When BLANK mode = 0, the device is in SOUT mode, BLANK pin is worked as SOUT select pin; when BLANK=
Low, SOUT is connected to the bit7 of the 16-bit shift register, worked as 8 channel device; when BLANK= High,
SOUT is connected to the bit15 of the 16-bit shift register, worked as 16ch device. If device is already in
ENABLE mode and we want to switch to SOUT mode, the new FC data with BIT[9]=0 must be input. Then it
enter SOUT mode.
If device is already in SOUT mode and the user wants to switch to ENABLE mode. First make sure BLANK pin is
high, SOUT is connected with bit15 of common shift register. Then input the new FC data with BIT[9] = 1. The
device enters ENABLE mode
When the IC is powered on, SOUT mode is selected as default value. Refer to table 7 for detail.
8.4.2 Power-Save Mode
In this mode, the device dissipation current becomes 30 µA (typical). When “PSMODE” bit is ‘1’, the power save
mode is enabled. Then if LAT rising edge is input to write all ‘0’ data into the output on-off data latch or to write
any data into the control data latch when the on-off data latch are all ‘0’, TLC5929 goes into the power save
mode. When SCLK rising edge is input, the device returns to normal operation. The power-save mode timing is
shown in Figure 7.
8.4.3 LED Open Detection (LOD)
LOD detects the fault caused by LED open circuit or a short from OUTn to ground by comparing the OUTn
voltage to the LOD detection threshold voltage level (V_LOD = 0.3 V typical). If the OUTn voltage is lower than
V_LOD, that output LOD bit is set to '1' to indicate an open LED. Otherwise, the LOD bit is set to '0'. LOD data are
only valid for outputs programmed to be on. LOD data for outputs programmed to be off are always '0' (Table
11).
The LOD data are stored into a 16-bit register called SID holder at BLANK rising edge when “SIDLD” bits is set
to ‘01b’ (Table6) or when Invisible Detection Mode (IDM) is enabled, the LOD data are stored to SID holder at
the end timing of IDM working time.
The stored LOD data can be read out through the common shift register as Status Information Data (SID) from
SOUT pin. LOD/LSD data are not valid until 0.5 µs after the falling edge of BLANK.
8.4.4 LED Short Detection (LSD)
LSD data detects the fault caused by a shorted LED by comparing the OUTn voltage to the LSD detection If the
OUTn voltage is higher than the programmed voltage, that output LSD bit is set to '1' to indicate a shorted LED.
Otherwise, the LSD bit is set to'0'. LSD data are only valid for outputs programmed to be on. LSD data for
outputs programmed to be off are always '0' (Table 4).
The LSD data are stored into a 16-bit register called SID holder at BLANK rising edge when “SIDLD” bits is set to
‘10b’ (Table6) or when Invisible Detection Mode (IDM) is enabled, the LSD data are stored to SID holder at the
end timing of IDM working time. The stored LSD data can be read out through the common shift register as
Status Information Data (SID) from SOUT pin. LOD/LSD data are not stabled until 0.5 µs after the falling edge of
BLANK. Therefore, BLANK must be low for at least that time.
The LSD need to be executed after propagation delay, “t_d4” or more from the device operation resumed from the
power save mode because LOD does not work during the power save mode.
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