CC2650_16 Datasheet, PDF (33/59 Pages) Texas Instruments – Multistandard Wireless MCU

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CC2650
SWRS158A – FEBRUARY 2015 – REVISED OCTOBER 2015
6.8 Power Management
To minimize power consumption, the CC2650 device supports a number of power modes and power
management features (see Table 6-2).
Table 6-2. Power Modes
MODE
SOFTWARE CONFIGURABLE POWER MODES
ACTIVE
IDLE
STANDBY
SHUTDOWN
RESET PIN
HELD
CPU
Active
Off
Off
Off
Off
Flash
On
Available
Off
Off
Off
SRAM
On
On
On
Off
Off
Radio
Available
Available
Off
Off
Off
Supply System
On
On
Duty Cycled
Off
Off
Current
Wake-up Time to CPU Active⁽¹⁾
1.45 mA + 31 µA/MHz
–
550 µA
14 µs
1 µA
151 µs
0.15 µA
1015 µs
0.1 µA
1015 µs
Register Retention
Full
Full
Partial
No
No
SRAM Retention
Full
Full
Full
No
No
High-Speed Clock
XOSC_HF or
RCOSC_HF
XOSC_HF or
RCOSC_HF
Off
Off
Off
Low-Speed Clock
XOSC_LF or
RCOSC_LF
XOSC_LF or
RCOSC_LF
XOSC_LF or
RCOSC_LF
Off
Off
Peripherals
Available
Available
Off
Off
Off
Sensor Controller
Available
Available
Available
Off
Off
Wake up on RTC
Available
Available
Available
Off
Off
Wake up on Pin Edge
Available
Available
Available
Available
Off
Wake up on Reset Pin
Brown Out Detector (BOD)
Available
Active
Available
Active
Available
Duty Cycled⁽²⁾
Available
Off
Available
N/A
Power On Reset (POR)
Active
Active
Active
Active
N/A
(1) Not including RTOS overhead
(2) The Brown Out Detector is disabled between recharge periods in STANDBY. Lowering the supply voltage below the BOD threshold
between two recharge periods while in STANDBY may cause the BOD to lock the device upon wake-up until a Reset/POR releases it.
To avoid this, it is recommended that STANDBY mode is avoided if there is a risk that the supply voltage (VDDS) may drop below the
specified operating voltage range. For the same reason, it is also good practice to ensure that a power cycling operation, such as a
battery replacement, triggers a Power-on-reset by ensuring that the VDDS decoupling network is fully depleted before applying supply
voltage again (for example, inserting new batteries).
In active mode, the application CM3 CPU is actively executing code. Active mode provides normal
operation of the processor and all of the peripherals that are currently enabled. The system clock can be
any available clock source (see Table 6-2).
In idle mode, all active peripherals can be clocked, but the Application CPU core and memory are not
clocked and no code is executed. Any interrupt event will bring the processor back into active mode.
In standby mode, only the always-on domain (AON) is active. An external wake event, RTC event, or
sensor-controller event is required to bring the device back to active mode. MCU peripherals with retention
do not need to be reconfigured when waking up again, and the CPU continues execution from where it
went into standby mode. All GPIOs are latched in standby mode.
In shutdown mode, the device is turned off entirely, including the AON domain and the Sensor Controller.
The I/Os are latched with the value they had before entering shutdown mode. A change of state on any
I/O pin defined as a wake from Shutdown pin wakes up the device and functions as a reset trigger. The
CPU can differentiate between a reset in this way, a reset-by-reset pin, or a power-on-reset by reading the
reset status register. The only state retained in this mode is the latched I/O state and the Flash memory
contents.
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