THS6212 Datasheet, PDF (31/48 Pages) Texas Instruments – Differential, Line-Driver Amplifier

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THS6212
SBOS758 – MAY 2016
Typical Applications (continued)
8.2.2 Dual-Supply Downstream Driver
Figure 84 shows an example of a dual-supply downstream driver with a synthesized output impedance circuit.
The THS6212 is configured as a differential gain stage to provide a signal drive to the primary winding of the
transformer (a step-up transformer with a turns ratio of 1:n is shown in Figure 84). The main advantage of this
configuration is the cancellation of all even harmonic-distortion products. Another important advantage is that
each amplifier must only swing half of the total output required driving the load.
AFE
2 V_PP
Max
Assumed
0.1 mF
0.1 mF
20 W
12 V
D1
THS6212
R_F
2.2 kW
I_P = 159 mA
R_M
10 W _1:1.1
2 kW
2 kW
R_P
2.9 kW
R_G
1.4 kW
R_P
2.9 kW
R_F
2.2 kW
R_M
10 W
Z_LINE
R_L
100 W
20 W
D2
THS6212
I_P = 159 mA
-12 V
Copyright © 2016, Texas Instruments Incorporated
Figure 84. Dual-Supply Downstream Driver
The analog front-end (AFE) signal is ac-coupled to the driver, and the noninverting input of each amplifier is
biased to the mid-supply voltage (ground in this case). In addition to providing the proper biasing to the amplifier,
this approach also provides a high-pass filtering with a corner frequency that is set at 5 kHz in this example.
Because the signal bandwidth starts at 26 kHz, this high-pass filter does not generate any problems and has the
advantage of filtering out unwanted lower frequencies.
8.2.2.1 Design Requirements
The main design requirements for Figure 84 are to match the output impedance correctly, satisfy headroom
requirements, and ensure that the circuit meets power driving requirements. These requirements are described in
the Detailed Design Procedure section and include the required equations to properly implement the design. The
design must be fully worked through before physical implementation because small changes in a single
parameter can often have large effects on performance.
8.2.2.2 Detailed Design Procedure
For Figure 84, the input signal is amplified with a gain set by Equation 6:
G_D = 1 +
2 ´ R_F
R_G
(6)
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