THS6212 Datasheet, PDF (26/48 Pages) Texas Instruments – Differential, Line-Driver Amplifier

THS6212
SBOS758 – MAY 2016
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Feature Description (continued)
(increasing the available output current). In steady-state operation, the available output voltage and current are
always greater than that shown in the overtemperature specifications because the output stage junction
temperatures are higher than the minimum specified operating ambient temperature. To maintain maximum
output stage linearity, no output short-circuit protection is provided. This absence of short-circuit protection is
normally not a problem because most applications include a series-matching resistor at the output that limits the
internal power dissipation if the output side of this resistor is shorted to ground. However, shorting the output pin
directly to the adjacent positive power-supply pin (24-pin package), in most cases destroys the amplifier. If
additional short-circuit protection is required, a small series resistor can be included in the supply lines. Under
heavy output loads, this additional resistor reduces the available output voltage swing. A 5-Ω series resistor in
each power-supply lead limits the internal power dissipation to less than 1 W for an output short-circuit, and
decreases the available output voltage swing by only 0.5 V for up to 100-mA desired load currents. Always place
the 0.1-µF power-supply decoupling capacitors after these supply current limiting resistors, directly on the supply
pins.
7.3.2 Driving Capacitive Loads
One of the most demanding and yet very common load conditions for an op amp is capacitive loading. Often, the
capacitive load is the input of an ADC—including additional external capacitance that can be recommended to
improve the ADC linearity. A high-speed, high open-loop gain amplifier such as the THS6212 can be very
susceptible to decreased stability and closed-loop response peaking when a capacitive load is placed directly on
the output pin. When the amplifier open-loop output resistance is considered, this capacitive load introduces an
additional pole in the signal path that can decrease the phase margin. One external solution to this problem is
described in this section.
When the primary considerations are frequency response flatness, pulse response fidelity, and distortion, the
simplest and most effective solution is to isolate the capacitive load from the feedback loop by inserting a series
isolation resistor between the amplifier output and the capacitive load. This series resistor does not eliminate the
pole from the loop response, but shifts the pole and adds a zero at a higher frequency. The additional zero
functions to cancel the phase lag from the capacitive load pole, thus increasing the phase margin and improving
stability. The Typical Characteristics sections describe the recommended R_S versus capacitive load (see
Figure 5, Figure 23, Figure 35, Figure 47, Figure 60, and Figure 72) and the resulting frequency response at the
load. Parasitic capacitive loads greater than 2 pF can begin to degrade device performance. Long printed-circuit
board (PCB) traces, unmatched cables, and connections to multiple devices can easily cause this value to be
exceeded. Always consider this effect carefully, and add the recommended series resistor as close as possible to
the THS6212 output pin (see the Board Layout Guidelines section).
7.3.3 Distortion Performance
The THS6212 provides good distortion performance into a 100-Ω load on ±12-V supplies. Relative to alternative
solutions, the amplifier provides exceptional performance into lighter loads and operation on a dual ±6-V supply.
Generally, until the fundamental signal reaches very high frequency or power levels, the second harmonic
dominates the distortion with a negligible third-harmonic component. Focusing then on the second harmonic,
increasing the load impedance improves distortion directly. Remember that the total load includes the feedback
network—in the noninverting configuration (see Figure 81), this value is the sum of R_F + R_G, whereas in the
inverting configuration this value is just R_F. Providing an additional supply decoupling capacitor (0.01 µF)
between the supply pins (for bipolar operation) also improves the second-order distortion slightly (from 3 dB to
6 dB).
In most op amps, increasing the output voltage swing directly increases harmonic distortion. The Typical
Characteristics sections illustrate the second harmonic increasing at a little less than the expected 2x rate,
whereas the third harmonic increases at a little less than the expected 3x rate. Where the test power doubles,
the difference between the fundamental power and the second harmonic decreases less than the expected 6 dB,
whereas the difference between the fundamental power and the third harmonic decreases by less than the
expected 12 dB. This difference also appears in the two-tone, third-order intermodulation (IM3) spurious
response curves. The third-order spurious levels are extremely low at low-output power levels. The output stage
continues to hold the third-order spurious levels low even when the fundamental power reaches very high levels.
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