THS6212 Datasheet, PDF (30/48 Pages) Texas Instruments – Differential, Line-Driver Amplifier

THS6212
SBOS758 – MAY 2016
www.ti.com
Typical Applications (continued)
8.2.1.2 Detailed Design Procedure
For ease of test purposes in this design, the THS6212 input impedance is set to 50 Ω with a resistor to ground
and the output impedance is set to 50 Ω with a series output resistor. Voltage swings reported in the Electrical
Characteristics tables are taken directly at the input and output pins, whereas load powers (dBm) are defined at
a matched 50-Ω load. For the circuit of Figure 81, the total effective load is 100 Ω || 1.24 kΩ || 1.24 kΩ = 86.1 Ω.
This approach allows a source termination impedance to be set at the input that is independent of the signal
gain. For instance, simple differential filters can be included in the signal path right up to the noninverting inputs
with no interaction with the gain setting. The differential signal gain for the circuit of Figure 81 is given by
Equation 5:
A_D = 1 + 2 ´
R_F
R_G
where
• A_D = differential gain
(5)
A value of 274 Ω for the A_D = 10-V/V design is given by Figure 81. The device bandwidth is primarily controlled
with the feedback resistor value because the THS6212 is a current-feedback (CFB) amplifier; the differential
gain, however, can be adjusted with considerable freedom using just the R_G resistor. In fact, R_G can be reduced
by a reactive network that provides a very isolated shaping to the differential frequency response.
Various combinations of single-supply or ac-coupled gain can also be delivered using the basic circuit of
Figure 81. Common-mode bias voltages on the two noninverting inputs pass on to the output with a gain of 1 V/V
because an equal dc voltage at each inverting node does not create current through R_G. This circuit does show a
common-mode gain of 1 V/V from the input to output. The source connection must either remove this common-
mode signal if undesired (using an input transformer can provide this function), or the common-mode voltage at
the inputs can be used to set the output common-mode bias. If the low common-mode rejection of this circuit is a
problem, the output interface can also be used to reject that common-mode signal. For instance, most modern
differential input analog-to-digital converters (ADCs) reject common-mode signals very well, and a line-driver
application through a transformer also attenuates the common-mode signal through to the line.
8.2.1.3 Application Curves
Figure 82 and Figure 83 show the frequency response and distortion performance of the circuit in Figure 81. The
measurements are made with a load resistor (R_L) of 100 Ω, and at room temperature. Figure 82 is measured
using the three different device power modes, and the distortion measurements in Figure 83 are made at an
output voltage level of 2 V_PP.
3
0
-3
-6
-9
-12
-15
-18
1
Full-Bias (100%) Mode
Mid-Bias (75%) Mode
Low-Bias (50%) Mode
10
100
Frequency (MHz)
Figure 82. Frequency Response
400
D002
-50
HD2
HD3
-60
-70
-80
-90
-100
-110
0.4
1
10
Frequency (MHz)
Figure 83. Harmonic Distortion
40
D007
30
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