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LP3950 Datasheet, PDF (31/38 Pages) National Semiconductor (TI) – Color LED Driver with Audio Synchronizer
LP3950
www.ti.com
SNVS331C – NOVEMBER 2004 – REVISED APRIL 2013
VDD = 2.7V TO 2.9V
VDDIO
CVDD_IO
100 nF
RSO
100 k:
MICROCONTROLLER
VDD = 2.7V TO 2.9V
R4
100 k:
R3
100 k:
+ LMV321 C110nF
-
C4 R1
R2
100 k:
100 nF 10 k:
SINGE ENDED
NC
AUDIO SIGNAL
NC
RT 82k
CVREF
100 nF
CVDD1
100 nF
CVDD2
100 nF
VDD1
VDD_IO
VDD2
VDDA
CVDDA
100 nF VIN = 3.0V TO 4.5V
CIN
L1
10 PF 4.7 PH
SW
IF_SEL
FB
SO
PWM_LED
SCK
R1
SI
SS
NRST
LP3950 G1
ASE
B1
AD1
AD2
RT
R2
VREF
DME
G2
AMODE
GND_RGB
GND_BOOST
B2
GNDA GND1 GND2 GND3
RR1
RR2
RR3
RR4
BACKLIGHT LEDS
RG1
RG2
RG3
RB1
RB2
RB3
KEYPAD LEDS
AUDIO SYNC. FUNLIGHT
RR5
RR6
RG4
RG5
RB4
RB5
D1
COUT
10 PF
Figure 34. Backlight and Keypad LEDs Controlled by the Pattern Generator
Funlight LEDs Controlled by Audio Synchronization
There may be cases where the audio input signal going into the LP3950 is too weak for audio synchronization.
This figure presents a single-supply inverting amplifier connected to the ASE input for audio signal amplification.
The amplification is +20 dB, which is well enough for 20 mVp-p audio signal. Because the amplifier (LMV321) is
operating in single supply voltage, a voltage divider using R3 and R4 is implemented to bias the amplifier so the
input signal is within the input common-mode voltage range of the amplifier. The capacitor C4 is placed between
the inverting input and resistor R1 to block the DC signal going into the audio signal source. The values of R1 and
C4 affect the cutoff frequency, fc = 1/(2*Pi*R1*C4), in this case it is around 160 Hz. As a result, the LMV321
output signal is centered around mid-supply, that is VDD/2. The output can swing to both rails, maximizing the
signal-to-noise ratio in a low voltage system
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