LM3S9B92_16 Datasheet, PDF (31/1403 Pages) Texas Instruments – Stellaris LM3S9B92 Microcontroller

Stellaris^® LM3S9B92 Microcontroller
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Register 21:
Register 22:
Register 23:
Register 24:
Register 25:
Register 26:
Register 27:
Register 28:
Register 29:
Ethernet MAC Management Receive Data (MACMRXD), offset 0x030 .............................. 949
Ethernet MAC Number of Packets (MACNP), offset 0x034 ............................................... 950
Ethernet MAC Transmission Request (MACTR), offset 0x038 ........................................... 951
Ethernet MAC LED Encoding (MACLED), offset 0x040 .................................................... 952
Ethernet PHY MDIX (MDIX), offset 0x044 ....................................................................... 954
Ethernet PHY Management Register 0 – Control (MR0), address 0x00 ............................. 955
Ethernet PHY Management Register 1 – Status (MR1), address 0x01 .............................. 957
Ethernet PHY Management Register 2 – PHY Identifier 1 (MR2), address 0x02 ................. 959
Ethernet PHY Management Register 3 – PHY Identifier 2 (MR3), address 0x03 ................. 960
Ethernet PHY Management Register 4 – Auto-Negotiation Advertisement (MR4), address
0x04 ............................................................................................................................. 961
Ethernet PHY Management Register 5 – Auto-Negotiation Link Partner Base Page Ability
(MR5), address 0x05 ..................................................................................................... 963
Ethernet PHY Management Register 6 – Auto-Negotiation Expansion (MR6), address
0x06 ............................................................................................................................. 965
Ethernet PHY Management Register 16 – Vendor-Specific (MR16), address 0x10 ............. 966
Ethernet PHY Management Register 17 – Mode Control/Status (MR17), address 0x11 ...... 967
Ethernet PHY Management Register 27 – Special Control/Status (MR27), address
0x1B ............................................................................................................................. 969
Ethernet PHY Management Register 29 – Interrupt Status (MR29), address 0x1D ............. 970
Ethernet PHY Management Register 30 – Interrupt Mask (MR30), address 0x1E ............... 972
Ethernet PHY Management Register 31 – PHY Special Control/Status (MR31), address
0x1F ............................................................................................................................. 974
Universal Serial Bus (USB) Controller ....................................................................................... 975
Register 1: USB Device Functional Address (USBFADDR), offset 0x000 .......................................... 1003
Register 2: USB Power (USBPOWER), offset 0x001 ....................................................................... 1004
Register 3: USB Transmit Interrupt Status (USBTXIS), offset 0x002 ................................................. 1007
Register 4: USB Receive Interrupt Status (USBRXIS), offset 0x004 ................................................. 1009
Register 5: USB Transmit Interrupt Enable (USBTXIE), offset 0x006 ................................................ 1011
Register 6: USB Receive Interrupt Enable (USBRXIE), offset 0x008 ................................................. 1013
Register 7: USB General Interrupt Status (USBIS), offset 0x00A ...................................................... 1015
Register 8: USB Interrupt Enable (USBIE), offset 0x00B .................................................................. 1018
Register 9: USB Frame Value (USBFRAME), offset 0x00C .............................................................. 1021
Register 10: USB Endpoint Index (USBEPIDX), offset 0x00E ............................................................ 1022
Register 11: USB Test Mode (USBTEST), offset 0x00F ..................................................................... 1023
Register 12: USB FIFO Endpoint 0 (USBFIFO0), offset 0x020 ........................................................... 1025
Register 13: USB FIFO Endpoint 1 (USBFIFO1), offset 0x024 ........................................................... 1025
Register 14: USB FIFO Endpoint 2 (USBFIFO2), offset 0x028 ........................................................... 1025
Register 15: USB FIFO Endpoint 3 (USBFIFO3), offset 0x02C ........................................................... 1025
Register 16: USB FIFO Endpoint 4 (USBFIFO4), offset 0x030 ........................................................... 1025
Register 17: USB FIFO Endpoint 5 (USBFIFO5), offset 0x034 ........................................................... 1025
Register 18: USB FIFO Endpoint 6 (USBFIFO6), offset 0x038 ........................................................... 1025
Register 19: USB FIFO Endpoint 7 (USBFIFO7), offset 0x03C ........................................................... 1025
Register 20: USB FIFO Endpoint 8 (USBFIFO8), offset 0x040 ........................................................... 1025
Register 21: USB FIFO Endpoint 9 (USBFIFO9), offset 0x044 ........................................................... 1025
Register 22: USB FIFO Endpoint 10 (USBFIFO10), offset 0x048 ....................................................... 1025
Register 23: USB FIFO Endpoint 11 (USBFIFO11), offset 0x04C ....................................................... 1025
Register 24: USB FIFO Endpoint 12 (USBFIFO12), offset 0x050 ....................................................... 1025
July 03, 2014
31
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