LM3S9B92_16 Datasheet, PDF (206/1403 Pages) Texas Instruments – Stellaris LM3S9B92 Microcontroller

System Control
5.2.3
5.2.3.1
5.2.3.2
5.2.4
The watchdog reset timing is shown in Figure 26-9 on page 1314.
Non-Maskable Interrupt
The microcontroller has three sources of non-maskable interrupt (NMI):
■ The assertion of the NMI signal
■ A main oscillator verification error
■ The NMISET bit in the Interrupt Control and State (INTCTRL) register in the Cortex^™-M3 (see
page 153).
Software must check the cause of the interrupt in order to distinguish among the sources.
NMI Pin
The NMI signal is the alternate function for GPIO port pin PB7. The alternate function must be
enabled in the GPIO for the signal to be used as an interrupt, as described in “General-Purpose
Input/Outputs (GPIOs)” on page 404. Note that enabling the NMI alternate function requires the use
of the GPIO lock and commit function just like the GPIO port pins associated with JTAG/SWD
functionality, see page 441. The active sense of the NMI signal is High; asserting the enabled NMI
signal above V_IH initiates the NMI interrupt sequence.
Main Oscillator Verification Failure
The LM3S9B92 microcontroller provides a main oscillator verification circuit that generates an error
condition if the oscillator is running too fast or too slow. If the main oscillator verification circuit is
enabled and a failure occurs, a power-on reset is generated and control is transferred to the NMI
handler. The NMI handler is used to address the main oscillator verification failure because the
necessary code can be removed from the general reset handler, speeding up reset processing. The
detection circuit is enabled by setting the CVAL bit in the Main Oscillator Control (MOSCCTL)
register. The main oscillator verification error is indicated in the main oscillator fail status (MOSCFAIL)
bit in the Reset Cause (RESC) register. The main oscillator verification circuit action is described
in more detail in “Main Oscillator Verification Circuit” on page 213.
Power Control
The Stellaris^® microcontroller provides an integrated LDO regulator that is used to provide power
to the majority of the microcontroller's internal logic. Figure 5-4 shows the power architecture.
An external LDO may not be used.
Note: VDDA must be supplied with a voltage that meets the specification in Table 26-2 on page 1309,
or the microcontroller does not function properly. VDDA is the supply for all of the analog
circuitry on the device, including the clock circuitry.
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July 03, 2014
Texas Instruments-Production Data