MSP430F6459-HIREL Datasheet, PDF (3/125 Pages) Texas Instruments – Mixed-Signal Microcontroller

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MSP430F6459-HIREL
SLASEC3A – AUGUST 2016 – REVISED AUGUST 2016
Table of Contents
1 Device Overview ......................................... 1
1.1 Features .............................................. 1
1.2 Applications........................................... 1
1.3 Description............................................ 2
1.4 Functional Block Diagram ............................ 2
2 Revision History ......................................... 4
3 Device Comparison ..................................... 5
4 Terminal Configuration and Functions.............. 6
4.1 Pin Diagram .......................................... 6
4.2 Signal Descriptions ................................... 7
5 Specifications ........................................... 14
5.1 Absolute Maximum Ratings ......................... 14
5.2 ESD Ratings ........................................ 14
5.3 Recommended Operating Conditions............... 14
5.4 Active Mode Supply Current Into V_CC Excluding
External Current..................................... 16
5.5 LEoxwcl-uPdoinwgerEMxteordneaSl _{CupuprrleynCt.}u_.r_.r_.e_.n_.t_.s_..(_.I_.n_.t_.o_..V_.C.C..)_{....... 16}
5.6 Low-Power Mode With LCD Supply Currents (Into
V_CC) Excluding External Current .................... 18
5.7 Schmitt-Trigger Inputs – General-Purpose I/O ..... 19
5.8 Leakage Current – General-Purpose I/O ........... 19
5.9 Outputs – General-Purpose I/O (Full Drive
Strength) ............................................ 19
5.10 Outputs – General-Purpose I/O (Reduced Drive
Strength) ............................................ 19
5.11 Thermal Resistance Characteristics for PZ Package
...................................................... 20
5.12 Typical Characteristics – Outputs, Reduced Drive
Strength (PxDS.y = 0)............................... 21
5.13 Typical Characteristics – Outputs, Full Drive
Strength (PxDS.y = 1)............................... 22
5.14 Timing and Switching Characteristics ............... 23
6 Detailed Description ................................... 50
6.1 Overview ............................................ 50
6.2 CPU ................................................. 50
6.3 Instruction Set....................................... 51
6.4 Operating Modes.................................... 52
6.5 Interrupt Vector Addresses.......................... 53
6.6 Memory Organization ............................... 55
6.7 Bootloader (BSL) .................................... 55
6.8 JTAG Operation ..................................... 57
6.9 Flash Memory ....................................... 57
6.10 Memory Integrity Detection (MID)................... 58
6.11 RAM ................................................. 58
6.12 Backup RAM ........................................ 59
6.13 Peripherals .......................................... 59
6.14 Input/Output Schematics ............................ 86
6.15 Device Descriptors................................. 109
7 Applications, Implementation, and Layout ...... 110
7.1 Device Connection and Layout Fundamentals .... 110
7.2 Peripheral- and Interface-Specific Design
Information ......................................... 114
8 Device and Documentation Support .............. 116
8.1 Getting Started and Next Steps ................... 116
8.2 Device Nomenclature .............................. 116
8.3 Tools and Software ................................ 117
8.4 Documentation Support............................ 119
8.5 Receiving Notification of Documentation Updates. 120
8.6 Community Resources............................. 120
8.7 Trademarks ........................................ 120
8.8 Electrostatic Discharge Caution ................... 120
8.9 Export Control Notice .............................. 120
8.10 Glossary............................................ 120
9 Mechanical, Packaging, and Orderable
Information ............................................. 121
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