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LMH6583_14 Datasheet, PDF (3/24 Pages) Texas Instruments – LMH6583 16x8 550 MHz Analog Crosspoint Switch, Gain of 2
LMH6583
www.ti.com
SNOSAP5E – APRIL 2006 – REVISED MARCH 2013
Operating Ratings (1)
Temperature Range (2)
Supply Voltage Range
Thermal Resistance
64–Pin Exposed Pad HTQFP
θJA
27°C/W
−40°C to +85°C
±3V to ±5.5V
θJC
0.82°C/W
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications, see ±3.3V Electrical
Characteristics and ±5V Electrical Characteristics.
(2) The maximum power dissipation is a function of TJ(MAX)and θJA. The maximum allowable power dissipation at any ambient temperature
is PD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board.
±3.3V Electrical Characteristics (1)
Unless otherwise specified, typical conditions are: TA = 25°C, AV = +2, VS = ±3.3V, RL = 100Ω; Boldface limits apply at the
temperature extremes.
Symbol
Parameter
Conditions
Min (2)
Typ (3)
Max (2)
Units
Frequency Domain Performance
SSBW
LSBW
−3 dB Bandwidth
GF
0.1 dB Gain Flatness
DG
Differential Gain
DP
Differential Phase
Time Domain Response
VOUT = 0.5 VPP
VOUT = 2 VPP, RL = 1 kΩ
VOUT = 2 VPP, RL = 150Ω
VOUT = 2 VPP, RL = 150Ω
RL = 150Ω, 3.58 MHz/ 4.43 MHz
RL = 150Ω, 3.58 MHz/ 4.43 MHz
425
500
MHz
450
80
MHz
0.05
%
0.05
deg
tr
Rise Time
tf
Fall Time
OS
Overshoot
SR
Slew Rate
ts
Settling Time
Distortion And Noise Response
HD2
2nd Harmonic Distortion
HD3
3rd Harmonic Distortion
en
Input Referred Voltage Noise
in
Input Referred Noise Current
Switching Time
2V Step, 10% to 90%
2V Step, 10% to 90%
2V Step
4 VPP, 40% to 60% (4)
2V Step, VOUT within 0.5%
2 VPP, 10 MHz
2 VPP, 10 MHz
>1 MHz
>1 MHz
1.7
1.4
4
1700
9
−76
−76
12
2
16
ns
ns
%
V/µs
ns
dBc
dBc
nV/ √Hz
pA/ √Hz
ns
XTLK
Crosstalk
All Hostile, f = 100 MHz
−45
dBc
ISOL
Off Isolation
f = 100 MHz
−60
dBc
Static, DC Performance
AV
VOS
TCVOS
IB
TCIB
VO
Gain
Output Offset Voltage
Output Offset Voltage Average Drift
Input Bias Current
Input Bias Current Average Drift
Output Voltage Range
(5)
Non-Inverting (6)
Non-Inverting (5)
RL = 100Ω
1.986
2.00
2.014
±3
±17
mV
38
µV/°C
−5
µA
-12
nA/°C
±1.75
±2.1
V
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. No ensurance of parametric performance is
indicated in the electrical tables under conditions different than those tested.
(2) Room Temperature limits are 100% production tested at 25°C. Device self heating results in TJ ≥ TA, however, test time is insufficient for
TJto reach steady state conditions. Limits over the operating temperature range are ensured through correlation using Statistical Quality
Control (SQC) methods.
(3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped
production material.
(4) Slew Rate is the average of the rising and falling edges.
(5) Drift determined by dividing the change in parameter at temperature extremes by the total temperature change.
(6) Negative input current implies current flowing out of the device.
Copyright © 2006–2013, Texas Instruments Incorporated
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