LMH6583_14 Datasheet, PDF (17/24 Pages) Texas Instruments – LMH6583 16x8 550 MHz Analog Crosspoint Switch, Gain of 2

LMH6583
www.ti.com
SNOSAP5E – APRIL 2006 – REVISED MARCH 2013
DAISY CHAIN OPTION IN SERIAL MODE
The LMH6583 supports daisy chaining of the serial data stream between multiple chips. This feature is available
only in the Serial programming mode. To use this feature serial data is clocked into the first chip DIN pin, and the
next chip DIN pin is connected to the DOUT pin of the first chip. Both chips may share a chip select signal, or the
second chip can be enabled separately. When the chip select pin goes low on both chips a double length word is
clocked into the first chip. As the first word is clocking into the first chip the second chip is receiving the data that
was originally in the shift register of the first chip (invalid data). When a full 40 bits have been clocked into the
first chip the next clock cycle begins moving the first frame of the new configuration data into the second chip.
With a full 80 clock cycles both chips have valid data and the chip select pin of both chips should be brought high
to prevent the data from overshooting. A configure pulse will activate the new configuration on both chips
simultaneously, or each chip can be configured separately. The mode, chip select, configure and clock pins of
both chips can be tied together and driven from the same sources.
SPECIAL CONTROL PINS
The LMH6583 has two special control pins that function independent of the serial control bus. One of these pins
is the reset (RST) pin. The RST pin is active high meaning that a logic 1 level the chip is configured with all
outputs disabled and in a high impedance state. The RST pin programs all the registers with input address 0 and
all the outputs are turned off. In this configuration the device draws only 20 mA. The reset pin can used as a
shutdown function to reduce power consumption. The other special control pin is the broadcast (BCST) pin. The
BCST pin is also active high and sets all the outputs to the on state connected to input 0. Both of these pins are
level sensitive and require no clock signal. The two special control pins overwrite the contents of the
configuration register.
THERMAL MANAGEMENT
The LMH6583 is packaged in a thermally enhanced Quad Flat Pack package. Even so, it is a high performance
device that produces a significant amount of heat. With a ±5V supply, the LMH6583 will dissipate approximately
1.1W of idling power with all outputs enabled. Idling power is calculated based on the typical supply current of
110 mA and a 10V supply voltage. This power dissipation will vary within the range of 800 mW to 1.4W due to
process variations. In addition, each equivalent video load (150Ω) connected to the outputs should be budgeted
30 mW of power. For a typical application with one video load for each output this would be a total power of 1.14
W. With a typical θ_JA of 27°C/W this will result in the silicon being 31°C over the ambient temperature. A more
aggressive application would be two video loads per output which would result in 1.38 W of power dissipation.
This would result in a 37°C temperature rise. For heavier loading, the HTQFP package thermal performance can
be significantly enhanced with an external heat sink and by providing for moving air ventilation. Also, be sure to
calculate the increase in ambient temperature from all devices operating in the system case. Because of the high
power output of this device, thermal management should be considered very early in the design process.
Generous passive venting and vertical board orientation may avoid the need for fan cooling or heat sinks. Also,
the LMH6583 can be operated with a ±3.3V power supply. This will cut power dissipation substantially while only
reducing bandwidth by about 10% (2 V_PP output). The LMH6583 is fully characterized and factory tested at the
±3.3V power supply condition for applications where reduced power is desired.
If a heat sink is desired AAVD/Thermalloy part # 375324B00035G is the proper size for the LMH6583 package.
This heat sink comes with adhesive tape for ease in assembly. With natural convection the heat sink will reduce
the θ_JA from 27°C/W to approximately 21°C/W. Using a fan will increase the effectiveness of the heat sink
considerably. When doing thermal design it is important to note that everything from board layout to case
material will impact the actual θ_JA of the device. The θ_JA specified in the datasheet is for a typical board layout.
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