LMH6583_14 Datasheet, PDF (16/24 Pages) Texas Instruments – LMH6583 16x8 550 MHz Analog Crosspoint Switch, Gain of 2

LMH6583
SNOSAP5E – APRIL 2006 – REVISED MARCH 2013
Table 4. Serial Mode Data Frame (Last 2 Words)⁽¹⁾
Output 6
Output 7
Input Address
On = 0
Input Address
LSB
MSB
Off = 1
LSB
30
31
32
33
34
35
36
37
(1) Bit 39 is last bit clocked into device.
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MSB
38
On = 0
Off = 1
39
ADDRESSED PROGRAMMING MODE
Addressed programming mode makes it possible to change only one output register at a time. To utilize this
mode the mode pin must be High. All other pins function the same as in serial programming mode except that
the word clocked in is 8 bits and is directed only at the output specified. In addressed mode the data format is
shown in Table 5.
Also illustrated is the timing relationships for the digital pins in Figure 41. It is important to note that all the pin
timing relationships are important, not just the data and clock pins. One example is that the Chip Select pin (CS)
must transition low before the first rising edge of the clock signal. This allows the internal timing circuits to
synchronize to allow data to be accepted on the next falling edge. After the final data bit has been clocked in, the
chip select pin must go high, then the clock signal must make at least one more low to high transition. As shown
in Figure 41, the chip select pin state should always occur while the clock signal is low. The configure (CFG) pin
timing is not so critical, but it does need to be kept low until all data has been shifted into the crosspoint registers.
1
T₁
CLK
0
T₂
T₃
T₄
T₅
T₆
T₇
T₈
T₉
T₁₀
T_S
T_S
1
CS_N
0
1
CFG
0
1
DIN
0
T_S
T_H
A₀
A₁
A₂
I_O
I₁
I₂
I₃
I₄
1
MODE
0
1
D_OUT
0
HIGH IMPEDANCE
Figure 41. Timing Diagram for Addressed Mode
Output Address
LSB
Table 5. Addressed Mode Word Format⁽¹⁾
MSB
Input Address
LSB
MSB
0
1
2
3
4
5
6
(1) Bit 0 is first bit clocked into device.
TRI-STATE
1 = TRI-STATE
0 = On
7
16
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