DRV8804_16 Datasheet, PDF (3/27 Pages) Texas Instruments – Quad Serial Interface Low-Side Driver IC

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5 Pin Configuration and Functions
DRV8804
SLVSAW4F – JULY 2011 – REVISED DECEMBER 2015
DW (Wide SOIC) Package
20-Pin Package
Top View
VM 1
VCLAMP 2
OUT1 3
OUT2 4
GND 5
GND 6
GND 7
OUT3 8
OUT4 9
nENBL 10
20 _nFAULT
19 _SDATOUT
18 _SDATIN
17 _SCLK
16 _GND
15 _GND
14 _GND
13 _LATCH
12 _NC
11 _RESET
VM 1
VCLAMP 2
OUT1 3
OUT2 4
GND 5
OUT3 ⁶
OUT4 ⁷
nENBL ⁸
PWP (HTSSOP)
16-Pin Package
Top View
16 _nFAULT
15 _SDATOUT
14 _SDATIN
13 _SCLK
GND
12 _GND
11 _LATCH
10 _NC
9 _RESET
PIN
NAME
SOIC
POWER AND GROUND
GND
5, 6, 7,
14, 15, 16
VM
1
CONTROL
LATCH
13
nENBL
10
RESET
11
SCLK
17
SDATIN
18
SDATOUT
19
STATUS
nFAULT
20
OUTPUT
OUT1
3
OUT2
4
OUT3
8
OUT4
9
VCLAMP
2
HTSSOP
5, 12,
PPAD
1
11
8
9
13
14
15
16
3
4
6
7
2
I/O ⁽¹⁾
Pin Functions
DESCRIPTION
— Device ground
— Device power supply
I
Latch input
I
Enable input
I
Reset input
I
Serial clock
I
Serial data input
O Serial data output
OD Fault
O Output 1
O Output 2
O Output 3
O Output 4
— Output clamp voltage
(1) Directions: I = input, O = output, OD = open-drain output
EXTERNAL COMPONENTS
OR CONNECTIONS
All pins must be connected to GND.
Connect to motor supply (8.2 V - 60 V).
Rising edge latches shift register to output
stage – internal pulldown
Active low enables outputs – internal pulldown
Active-high reset input initializes internal
logic – internal pulldown
Serial clock input – internal pulldown
Serial data input – internal pulldown
Serial data output; push-pull structure; see
serial interface section for details
Logic low when in fault condition
(overtemperature, overcurrent)
Connect to load 1
Connect to load 2
Connect to load 3
Connect to load 4
Connect to VM supply, or zener diode to VM
supply
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