DRV8804_16 Datasheet, PDF (14/27 Pages) Texas Instruments – Quad Serial Interface Low-Side Driver IC

DRV8804
SLVSAW4F – JULY 2011 – REVISED DECEMBER 2015
10 Layout
www.ti.com
10.1 Layout Guidelines
The voltage rating for bulk capacitors should be higher than the operating voltage, to provide margin for cases
when the motor transfers energy to the supply.
• Small-value capacitors should be ceramic, and placed closely to device pins.
• The high-current device outputs should use wide metal traces.
The device thermal pad should be soldered to the PCB top-layer ground plane. Multiple vias should be used to
connect to a large bottom-layer ground plane. The use of large metal planes and multiple vias help dissipate the
I² × R_DS(on) heat that is generated in the device.
10.2 Layout Example
VM
VCLAMP
OUT1
OUT2
GND
OUT3
OUT4
nENBL
nFAULT
SDATOUT
SDATIN
SCLK
GND
LATCH
NC
RESET
Figure 13. Layout Recommendation
10.3 Thermal Considerations
The DRV8804 has thermal shutdown (TSD) as described in Thermal Shutdown (TSD). If the die temperature
exceeds approximately 150°C, the device will be disabled until the temperature drops to a safe level.
Any tendency of the device to enter TSD is an indication of either excessive power dissipation, insufficient
heatsinking, or too high an ambient temperature.
10.3.1 Power Dissipation
Power dissipation in the DRV8804 is dominated by the power dissipated in the output FET resistance, or R_DS(ON).
Average power dissipation of each FET when running a static load can be roughly estimated by Equation 2.
P = R_DS(ON) · (I_OUT)²
where
• P is the power dissipation of one FET
• R_DS(ON) is the resistance of each FET
• I_OUT is equal to the average current drawn by the load
(2)
14
Submit Documentation Feedback
Product Folder Links: DRV8804
Copyright © 2011–2015, Texas Instruments Incorporated