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DRV8412_11 Datasheet, PDF (3/31 Pages) Texas Instruments – Dual Full Bridge PWM Motor Driver
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PACKAGE HEAT DISSIPATION RATINGS
PARAMETER
RθJC, junction-to-case (power pad / heat slug) thermal
resistance
RθJA, junction-to-ambient thermal resistance
Exposed power pad / heat slug area
DRV8412
1.1 °C/W
25 °C/W
34 mm2
DRV8412
DRV8432
SLES242D – DECEMBER 2009 – REVISED JULY 2011
DRV8432
0.9 °C/W
This device is not intended to be used without a
heatsink. Therefore, RθJA is not specified. See the
Thermal Information section.
80 mm2
PACKAGE POWER DERATINGS (DRV8412)(1)
PACKAGE
TA = 25°C
POWER
RATING
DERATING
FACTOR
ABOVE TA =
25°C
TA = 70°C POWER
RATING
44-PIN TSSOP (DDW)
5.0 W
40.0 mW/°C
3.2 W
(1) Based on EVM board layout
TA = 85°C POWER
RATING
2.6 W
TA = 125°C POWER
RATING
1.0 W
MODE SELECTION PINS
MODE PINS
M3
M2
M1
0
0
0
OUTPUT
CONFIGURATION
2 FB or 4 HB
0
0
1
0
1
0
0
1
1
1
x
x
2 FB or 4 HB
1 PFB
2 FB
DESCRIPTION
Dual full bridges (two PWM inputs each full bridge) or four half bridges with
cycle-by-cycle current limit
Dual full bridges (two PWM inputs each full bridge) or four half bridges with
OC latching shutdown (no cycle-by-cycle current limit)
Parallel full bridge with cycle-by-cycle current limit
Dual full bridges (one PWM input each full bridge with complementary PWM
on second half bridge) with cycle-by-cycle current limit
Reserved
Copyright © 2009–2011, Texas Instruments Incorporated
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