DRV5013_16 Datasheet, PDF (3/28 Pages) Texas Instruments – Digital-Latch Hall Effect Sensor

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DRV5013
SLIS150E – MARCH 2014 – REVISED FEBRUARY 2016
Changes from Original (March 2014) to Revision A
Page
• Changed the power-on value from 50 to 35 µs in the Features list ...................................................................................... 1
• Changed RPM Meter to Tachometers in the Applications list ............................................................................................... 1
• Changed all references to Hall IC to Hall Effect Sensor ....................................................................................................... 1
• Changed the type of the OUT terminal from OD to Output in the Pin Functions table ......................................................... 4
• Deleted the Output terminal current row in the Absolute Maximum Ratings table and changed V_CCmax to V_CC after
the voltage ramp rate for the power supply voltage ............................................................................................................... 5
• Changed R_O to R1 in the test conditions for t_r and t_f in the Switching Characteristics table.................................................. 6
• Added the bandwidth parameter to the Magnetic Characteristics table ................................................................................ 6
• Changed the MIN value for the +2.3 / – 2.3 mt B_RP parameter from +2.3 to –2.3 in the Magnetic Characteristics
table ....................................................................................................................................................................................... 6
• Deleted the condition statement from the Typical Characteristics section and changed all references of T_J to T_A in
the graph condition statements ............................................................................................................................................. 7
• Deleted Number from the Power-On Time case names and added conditions to the captions of the case timing
diagrams .............................................................................................................................................................................. 11
• Added the R1 tradeoff and lower current text after the equation in the Output Stage section ........................................... 13
• Added the C2 not required for most applications text after the second equation in the Output Stage section.................... 14
• Changed I_O to I_SINK in the condition statement of the FET overload fault condition in the Reverse Supply Protection
section .................................................................................................................................................................................. 15
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