BQ4010_14 Datasheet, PDF (3/16 Pages) Texas Instruments – 8 k ´ 8 NONVOLATILE SRAM (5 V, 3.3 V)

Not Recommended For New Designs
bq4010/Y/LY
www.ti.com
SLUS116A – MAY 1999 – REVISED JUNE 2007
When V_CC returns to a level above the internal backup cell voltage, the supply is switched back to V_CC. After V_CC
ramps above the V_PFD threshold, write-protection continues for a time t_CER (120 ms maximum in 5-V system,
85 ms maximum in 3.3-V system) to allow for processor stabilization. Normal memory operation may resume
after this time.
The internal coin cells used by the bq4010/Y/LY have an extremely long shelf life and provide data retention for
more than 10 years in the absence of system power.
As shipped from TI, the integral lithium cells of the MT-type module are electrically isolated from the memory.
(Self-discharge in this condition is approximately 0.5% per year.) Following the first application of V_CC, this
isolation is broken, and the lithium backup provides data retention on subsequent power-downs.
BLOCK DIAGRAM
DIP MODULE
bq4010/Y/LY
MA PACKAGE
OE
A₀ - A₁₂
8k×8
SRAM
WE
Block
DQ₀ - DQ₇
Power
CE_CON
CE
Power-Fail
V_CC
Control
MODE
Not selected
Output disable
Read
Write
Lithium
Cell
+
UDG-06075
TRUTH TABLE
CE
WE
OE
H
X
X
L
H
H
L
H
L
L
L
X
I/O OPERATION
High-Z
High-Z
D_OUT
D_IN
POWER
Standby
Active
Active
Active
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