TLC320AD75 Datasheet, PDF (28/43 Pages) Texas Instruments – 20-Bit Sigma-Delta Stereo ADA Circuit

3.3.8 DAC Filter Characteristics, f_s = 44.1 kHz
PARAMETER
Pass-band ripple
Stop-band attenuation
Group delay
TEST CONDITIONS
fs = 20 kHz
fs = 24.1 kHz
MIN
TYP
± 0.002
75
29 / fs
MAX
UNIT
dB
dB
s
3.3.9 Power Supply Current, f_s = 44.1 kHz
IDD(A)
IDD(AD)
IDD(DA1)
PARAMETER
Power-supply current,
analog (ADC)
Power-supply current,
digital (ADC)
Power-supply current,
digital (DAC)
TEST CONDITIONS
AVDD and LVDD
VDD1 and V35A
VDD2 and V35D
IDD(DA2)
IDD(AST)
IDD(DST)
Power-supply current,
PWM/OSC (DAC)
Power-down current,
analog (ADC)
Power-down current,
digital (ADC)
PVDDL, PVDDR,
and XVDD
AVDD and LVDD
VDD1 and V35A
PD
PSRR
Power dissipation
Power-supply rejection ratio
0 to 24 kHz
24 kHz to 2.798 MHz
MIN TYP MAX UNIT
29
40 mA
22
30 mA
20
25 mA
17
25 mA
250
µA
150
µA
400
mW
75
dB
85
dB
3.4 ADC Switching Characteristics (see Figures 2–1 and 4–1)
fMCKI
td(MDD)
td(MIRD)
td(SDD1)
td(SDD2)
PARAMETER
Input clock frequency, MCKI
Delay time, SCLKA↓ to ADOUT, master mode
Delay time, SCLKA↓ to LRCKA, master mode
Delay time, LRCKA to ADOUT, slave mode
Delay time, SCLKA↓ to ADOUT, slave mode
MIN TYP MAX UNIT
11.3 12.8 MHz
0
50 ns
– 20
20 ns
50 ns
50 ns
3–4