TLC320AD75 Datasheet, PDF (21/43 Pages) Texas Instruments – 20-Bit Sigma-Delta Stereo ADA Circuit

2.15 Sigma-Delta DAC Modulator
The DAC uses a third-order modulator with 32 times oversampling. The DAC provides high-resolution,
low-noise performance using a 15-value PWM output as shown in Figure 2–11.
APB(max)†
Quantization Noise Power With Noise Shaping
Audio
Signal
Noise Excluded by
Low-Pass Filter
Quantization Noise Power Without Noise Shaping
0
0
fB^‡
0.1
0.2
0.3
0.4
Normalized Analog-Output Frequency (fO/fs^§)
0.5
† _{APB(max) is the passband maximum amplitude.}
‡
§
fB
fO
is
is
the
the
highest frequency of interest within the baseband.
output frequency at the external low-pass filter output.
Figure 2–11. Oversampling Noise Power With and Without Noise Shaping
2.16 DAC Interpolation Filter
The interpolation filter used prior to the DAC increases the digital-data rate from the LRCKD speed to the
oversampled rate by interpolating with a ratio of 1:32. The oversampling modulator receives the output of
this filter with de-emphasis as an option.
2.17 DAC PWM Output (L2–L1 and R2–R1)
The L2 – L1 and the R2 – R1 output pairs are PWM signals with the L2 – L1 differential pulse duration
determining the left-channel analog voltage and the R2 – R1 differential pulse duration determining the
right-channel analog voltage.
Each DAC left and right output consists of 15 levels of PWM and provides a differential signal as the input
to two external differential amplifiers configured as a low-pass filter to produce the left and right audio
outputs.
2–9