TCA9548A_15 Datasheet, PDF (23/35 Pages) Texas Instruments – Low-Voltage 8-Channel I2C Switch With Reset

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TCA9548A
SCPS207E – MAY 2012 – REVISED OCTOBER 2015
V_POR is critical to the power-on reset. V_POR is the voltage level at which the reset condition is released and all the
registers and the I²C/SMBus state machine are initialized to their default states. The value of V_POR differs based
on the V_CC being lowered to or from 0. Figure 19 and Table 3 provide more details on this specification.
V_CC
V_PORR
V_PORF
POR
Time
Time
Figure 19. V_POR
11 Layout
11.1 Layout Guidelines
For PCB layout of the TCA9548A, common PCB layout practices should be followed but additional concerns
related to high-speed data transfer such as matched impedances and differential pairs are not a concern for I²C
signal speeds. It is common to have a dedicated ground plane on an inner layer of the board and pins that are
connected to ground should have a low-impedance path to the ground plane in the form of wide polygon pours
and multiple vias. By-pass and de-coupling capacitors are commonly used to control the voltage on the VCC pin,
using a larger capacitor to provide additional power in the event of a short power supply glitch and a smaller
capacitor to filter out high-frequency ripple.
In an application where voltage translation is not required, all V_DPUX voltages and V_CC could be at the same
potential and a single copper plane could connect all of pull-up resistors to the appropriate reference voltage. In
an application where voltage translation is required, V_DPUM and V_DPU0-V_DPU7, may all be on the same layer of the
board with split planes to isolate different voltage potentials.
To reduce the total I²C bus capacitance added by PCB parasitics, data lines (SCn and SDn) should be a short as
possible and the widths of the traces should also be minimized (e.g. 5-10 mils depending on copper weight).
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