TCA9548A_15 Datasheet, PDF (22/35 Pages) Texas Instruments – Low-Voltage 8-Channel I2C Switch With Reset

TCA9548A
SCPS207E – MAY 2012 – REVISED OCTOBER 2015
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10 Power Supply Recommendations
The operating power-supply voltage range of the TCA9548A is 1.65 V to 5.5 V applied at the VCC pin. When the
TCA9548A is powered on for the first time or anytime the device must be reset by cycling the power supply, the
power-on reset requirements must be followed to ensure the I²C bus logic is initialized properly.
10.1 Power-On Reset Requirements
In the event of a glitch or data corruption, TCA9548A can be reset to its default conditions by using the power-on
reset feature. Power-on reset requires that the device go through a power cycle to be completely reset. This
reset also happens when the device is powered on for the first time in an application.
A power-on reset is shown in Figure 17.
V_CC
Ramp-Down
Ramp-Up
V_CC drops below V_PORF – 50 mV
V_{CC_TRR}
V_{CC_FT}
Time to Re-Ramp
V_{CC_RT}
V_CC is Lowered Below the POR Threshold, Then Ramped Back Up to V_CC
Figure 17. Power-On Reset Waveform
Time
Table 3 specifies the performance of the power-on reset feature for TCA9548A for both types of power-on reset.
Table 3. Recommended Supply Sequencing and Ramp Rates⁽¹⁾
V_{CC_FT}
V_{CC_RT}
V_{CC_TRR}
V_{CC_GH}
V_{CC_GW}
PARAMETER
Fall time
Rise time
Time to re-ramp (when V_CC drops below V_PORF(min) – 50 mV or
when V_CC drops to GND)
Level that V_CC can glitch down to, but not cause a functional
disruption when V_{CC_GW} = 1 μs
Glitch width that will not cause a functional disruption when
V_{CC_GH} = 0.5 × V_CC
See Figure 17
See Figure 17
See Figure 17
See Figure 18
See Figure 18
MIN TYP
1
0.1
MAX
100
100
UNIT
ms
ms
40
μs
1.2 V
10 μs
(1) All supply sequencing and ramp rate values are measured at T_A = 25°C
Glitches in the power supply can also affect the power-on reset performance of this device. The glitch width
(V_{CC_GW}) and height (V_{CC_GH}) are dependent on each other. The bypass capacitance, source impedance, and
device impedance are factors that affect power-on reset performance. Figure 18 and Table 3 provide more
information on how to measure these specifications.
V_CC
V_{CC_GH}
V_{CC_GW}
Figure 18. Glitch Width and Glitch Height
Time
22
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