TLC320AD90 Datasheet, PDF (22/51 Pages) Texas Instruments – Stereo Audio Codec

16h
Aux
Volume
Mute 0
0 GL4 GL3 GL2 GL1 GL0 0
0
0 GR4 GR3 GR2 GR1 GR0 8808h
18h
PCM Out
Volume
Mute 0
0 GL4 GL3 GL2 GL1 GL0 0
0
0 GR4 GR3 GR2 GR1 GR0 8808h
† _{Optional AC‘97 registers whose functionality are not implemented on the TLC320AD90C. These registers can be written to, but reads always return zeroes.}
‡ _{Special function volume settings. If bit is set, then the 5 volume bits implemented are set to all ones.}
NOTE: All registers and all bits in all registers must have read back capabilities (be readable) to facilitate testing.
Table 2–4. TLC320AD90C Register Definitions (continued)
INDE
X
NAME
D15 D14 D13 D12 D11 D10 D9
D8
D7
D6
D5
D4 D3 D2 D1 D0 DEFAULT
Record
1Ah Select
0
0
0
0
0 SL2 SL1 SL0 0
0
0
0
0 SR2 SR1 SR0 0000h
Control
1Ch
Record
Gain
Mute 0
0
0 GL3 GL2 GL1 GL0 0
0
0
0 GR3 GR2 GR1 GR0 8000h
1Eh†
Record
Gain Mic
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0000h
20h
General
Purpose
0
0
0
0
0
0 MIX MS LPBK 0
0
0
0
0
0
0
0000h
22h†
3D
Control
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0000h
Modem
24h†
Rate
(Not
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0000h
Used)
Power-
26h
Down
Control/
0
0 PR5 PR4 PR3 PR2 PR1 PR0 0
0
0
0 REF ANL DAC ADC
na
Status
28h– Reserve
59h d
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0