THS3202_16 Datasheet, PDF (20/37 Pages) Texas Instruments – 2-GHz, LOW DISTORTION, DUAL CURRENT-FEEDBACK AMPLIFIERS

THS3202
SLOS242F – SEPTEMBER 2002 – REVISED JANUARY 2010
www.ti.com
This brings up another noise measurement usually preferred in RF applications, the noise figure (NF). Noise
figure is a measure of noise degradation caused by the amplifier. The value of the source resistance must be
defined and is typically 50 Ω in RF applications.
NF
+
ȧȱȲ ^10log
eni ²
eRs2
ȧȳȴ
Because the dominant noise components are generally the source resistance and the internal amplifier noise
voltage, we can approximate the noise figure as:
ǒ Ǔ _NF
+
ȱ
10log^{ȧȧȧȧȧ}1
ȧȡȢ
)
en
ǒ 2
) IN )
4 kTRS
Ȳ
RSǓ²_{ȧȣȤȧȧȧȧȧȳ}
È´
PRINTED-CIRCUIT BOARD LAYOUT TECHNIQUES FOR OPTIMAL PERFORMANCE
Achieving optimum performance with high-frequency amplifier-like devices in the THS320x family requires careful
attention to board layout parasitic and external component types.
Recommendations that optimize performance include:
• Minimize parasitic capacitance to any ac ground for all of the signal I/O pins. Parasitic capacitance on the
output and input pins can cause instability. To reduce unwanted capacitance, a window around the signal I/O
pins should be opened in all of the ground and power planes around those pins. Otherwise, ground and
power planes should be unbroken elsewhere on the board.
• Minimize the distance (< 0.25” or < 6,35 mm) from the power-supply pins to high-frequency 0.1-µF and 100
pF decoupling capacitors. At the device pins, the ground and power-plane layout should not be in close
proximity to the signal I/O pins. Avoid narrow power and ground traces to minimize inductance between the
pins and the decoupling capacitors. The power-supply connections should always be decoupled with these
capacitors. Larger (6.8 µF or more) tantalum decoupling capacitors, effective at lower frequency, should also
be used on the main supply pins. These may be placed somewhat farther from the device and may be shared
among several devices in the same area of the printed circuit board (PCB). The primary goal is to minimize
the impedance seen in the differential-current return paths. For driving differential loads with the THS3202,
adding a capacitor between the power-supply pins improves 2nd order harmonic distortion performance. This
also minimizes the current loop formed by the differential drive.
• Careful selection and placement of external components preserve the high-frequency performance of the
THS320x family. Resistors should be a very low reactance type. Surface-mount resistors work best and allow
a tighter overall layout. Again, keep their leads and PCB trace length as short as possible. Never use
wirewound type resistors in a high-frequency application. Because the output pin and inverting input pins are
the most sensitive to parasitic capacitance, always position the feedback and series output resistors, if any,
as close as possible to the inverting input pins and output pins. Other network components, such as input
termination resistors, should be placed close to the gain-setting resistors. Even with a low parasitic
capacitance shunting the external resistors, excessively high resistor values can create significant time
constants that can degrade performance. Good axial metal-film or surface-mount resistors have
approximately 0.2 pF in shunt with the resistor. For resistor values greater than 2.0 kΩ, this parasitic
capacitance can add a pole and/or a zero that can affect circuit operation. Keep resistor values as low as
possible, consistent with load driving considerations.
• Connections to other wideband devices on the board may be made with short direct traces or through
onboard transmission lines. For short connections, consider the trace and the input to the next device as a
lumped capacitive load. Relatively wide traces (50 mils to 100 mils or 1,27 mm to 2,54 mm) should be used,
preferably with ground and power planes opened up around them. Estimate the total capacitive load and
determine if isolation resistors on the outputs are necessary. Low parasitic capacitive loads (less than 4 pF)
may not need an R_S because the THS320x family is nominally compensated to operate with a 2-pF parasitic
load. Higher parasitic capacitive loads without an R_S are allowed as the signal gain increases (increasing the
unloaded phase margin). If a long trace is required, and the 6-dB signal loss intrinsic to a doubly-terminated
20
Submit Documentation Feedback
Product Folder Link(s): THS3202
Copyright © 2002–2010, Texas Instruments Incorporated