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TMS320DM8168 Datasheet, PDF (2/312 Pages) Texas Instruments – TMS320DM816x DaVinci Digital Media Processors | |||
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TMS320DM8168, TMS320DM8167
TMS320DM8166, TMS320DM8165
SPRS614 â MARCH 2011
⢠One 16/24-bit and One 16-bit Channel
⢠Each Channel Splittable Into Dual 8-bit
Capture Channels
â Two 165 MHz HD Video Display Channels
⢠One 16/24/30-Bit and One 16-bit Channel
â Simultaneous SD and HD Analog Output
â Digital HDMI 1.3 transmitter with HDCP up to
165-MHz pixel clock
â Advanced Video Processing Features Such
as Scan/Format/Rate Conversion
â Three Graphics Layers and Compositors
⢠Dual 32-bit DDR2/3 SDRAM Interfaces
â Supports up to DDR2-800 and DDR3-1600
â Up to Eight x8 Devices Total
â 2 GB Total Address Space
â Dynamic Memory Manager (DMM)
⢠Programmable Multi-Zone Memory
Mapping and Interleaving
⢠Enables Efficient 2D Block Accesses
⢠Supports Tiled Objects in 0°, 90°, 180°, or
270 Orientation and Mirroring
⢠Optimizes Interlaced Accesses
⢠One PCI Express® (PCIe®) 2.0 Port With
Integrated PHY
â Single Port With 1 or 2 Lanes at 5.0 GT/s
â Configurable as Root Complex or Endpoint
⢠Serial ATA (SATA) 3.0 Gbps Controller With
Integrated PHYs
â Direct Interface for Two Hard Disk Drives
â Hardware-Assisted Native Command
Queuing (NCQ) from up to 32 Entries
â Supports Port Multiplier and
Command-Based Switching
⢠Two 10/100/1000 Mbps Ethernet MACs (EMAC)
â IEEE 802.3 Compliant (3.3V I/O Only)
â MII and GMII Media Independent I/Fs
â Management Data I/O (MDIO) Module
⢠Dual USB 2.0 Ports With Integrated PHYs
â USB 2.0 High-/Full-Speed Client
â USB 2.0 High-/Full-/Low-Speed Host
â Supports End Points 0-15
⢠General Purpose Memory Controller (GPMC)
â 8-/16-bit Multiplexed Address/Data Bus
â Up to 6 Chip Selects With up to 256M-Byte
Address Space per Chip Select Pin
â Glueless Interface to NOR Flash, NAND
Flash (With BCH and Hamming Error Code
Detection), SRAM and Pseudo-SRAM
â Error Locator Module (ELM) Outside of
GPMC to Provide Up to 16-Bit/512-Bytes
Hardware ECC for NAND
www.ti.com
â Flexible Asynchronous Protocol Control for
Interface to FPGA, CPLD, ASICs, etc.
⢠Enhanced Direct-Memory-Access (EDMA)
Controller
â Four Transfer Controllers
â 64/8 Independent DMA/QDMA Channels
⢠Seven 32-bit General-Purpose Timers
⢠One System Watchdog Timer
⢠Three Configurable UART/IrDA/CIR Modules
â UART0 With Modem Control Signals
â Supports up to 3.6864 Mbps UART
â SIR, MIR, FIR (4.0 MBAUD), and CIR
⢠One 40-MHz Serial Peripheral Interface (SPI)
With Four Chip-Selects
⢠SD/SDIO serial interface (1-/4-Bit)
⢠Dual Inter-Integrated Circuit ( I2C BUS®) Ports
⢠Three Multichannel Audio Serial Ports
â One Six-Serializer Transmit/Receive Port
â Two Dual-Serializer Transmit/Receive Ports
â DIT-Capable For S/PDIF (All Ports)
⢠Multichannel Buffered Serial Port (McBSP)
â Transmit/Receive Clocks up to 48 MHz
â Two Clock Zones and Two Serial Data Pins
â Supports TDM, I2S, and Similar Formats
⢠Real-Time Clock (RTC)
â One-Time or Periodic Interrupt Generation
⢠Up to 64 General-Purpose I/O (GPIO) Pins
⢠On-Chip ARM® ROM Bootloader (RBL)
⢠Power, Reset, and Clock Management
â SmartReflex⢠Technology (Level 2)
â Seven Independent Core Power Domains
â Clock Enable/Disable Control For
Subsystems and Peripherals
⢠IEEE-1149.1 (JTAG) and IEEE-1149.7 (cJTAG)
Compatible
⢠1031-Pin Pb-Free BGA Package (CYG Suffix),
0.65-mm Ball Pitch
⢠Via Channel⢠Technology Enables use of
0.8-mm Design Rules
⢠40-nm CMOS Technology
⢠3.3-V Single-Ended LVCMOS I/Os (except for
DDR3 at 1.5 V, DDR2 at 1.8 V, and DEV_CLKIN
at 1.8 V)
⢠Applications
â Video Encode/Decode/Transcode/Transrate
â Video Security
â Video Conferencing
â Video Infrastructure
â Media Server
â Digital Signage
2
Device Summary
Copyright © 2011, Texas Instruments Incorporated
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Product Folder Link(s): TMS320DM8168 TMS320DM8167 TMS320DM8166 TMS320DM8165
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