TMS320DM8168 Datasheet, PDF (165/312 Pages) Texas Instruments – TMS320DM816x DaVinci Digital Media Processors

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DDR[x]_D[0]
DDR[x]_D[7]
DDR[x]_DQM[0]
DDR[x]_DQS[0]
DDR[x]_DQS[0]
DDR[x]_D[8]
DDR[x]_D[15]
DDR[x]_DQM[1]
DDR[x]_DQS[1]
DDR[x]_DQS[1]
DDR[x]_ODT[0] T0
DDR_ODT1 NC
DDR_D16
DDR[x]_D[23
DDR[x]_DQM[2]
DDR[x]_DQS[2]
DDR[x]_DQS[2]
DDR[x]_D[24]
DDR[x]_D[31]
DDR[x]_DQM[3]
DDR[x]_DQS[3]
DDR[x]_DQS[3]
DDR[x]_BA[0] T0
DDR[x]_BA[2] T0
DDR[x]_A[0] T0
DDR[x]_A[14]
DDR[x]_CS[0]
DDR[x]_CS[1]
DDR[x]_CAS
DDR[x]_RAS
DDR[x]_WE
DDR[x]_CKE
DDR[x]_CLK[x]
DDR[x]_CLK[x]
VREFSSTL_DDR[x]
T0
T0
NC
T0
T0
T0
T0
T0
T0
0.1 µF^(B)
DDR[x]_RST NC
DDR2
ODT
DQ0
DQ7
LDM
LDQS
LDQS
DQ8
DQ15
UDM
UDQS
UDQS
BA0
BA2
A0
A14
CS
CAS
RAS
WE
CKE
CK
CK
VREF
VREF
0.1 µF^(B)
TMS320DM8168, TMS320DM8167
TMS320DM8166, TMS320DM8165
SPRS614 – MARCH 2011
DDR2
DQ0
DQ7
LDM
LDQS
LDQS
DQ8
DQ15
UDM
UDQS
UDQS
ODT
BA0
BA2
A0
A14
CS
CAS
RAS
WE
CKE
CK
CK
VREF
VREF
0.1 µF^(B)
0.1 µF
0.1 µF
Vio 1.8^(A)
1 K Ω 1%
VREF
1 K Ω 1%
DDR[x]_VTP
50 Ω (±2%)
T0 Termination is required. See terminator comments.
A. Vio1.8 is the power supply for the DDR2 memories and the DM816x DDR2 interface.
B. One of these capacitors can be eliminated if the divider and its capacitors are placed near a VREF pin.
Figure 8-5. 32-Bit DDR2 High-Level Schematic
Copyright © 2011, Texas Instruments Incorporated
Peripheral Information and Timings 165
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