AM1808_16 Datasheet, PDF (196/265 Pages) Texas Instruments – AM1808 ARM® Microprocessor

AM1808
SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
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6.24.1 LCD Interface Display Driver (LIDD Mode)
NO.
16 t_{su(LCD_D)}
17 t_{h(LCD_D)}
Table 6-108. Timing Requirements for LCD LIDD Mode
Setup time, LCD_D[15:0] valid before LCD_MCLK high
Hold time, LCD_D[15:0] valid after LCD_MCLK high
1.3V, 1.2V,
1.1V
MIN MAX
7
0
1.0V
MIN MAX
8
0
UNIT
ns
ns
Table 6-109. Switching Characteristics Over Recommended Operating Conditions for LCD LIDD Mode
NO.
PARAMETER
4 t_{d(LCD_D_V)}
Delay time, LCD_MCLK high to LCD_D[15:0] valid (write)
5 t_{d(LCD_D_I)}
Delay time, LCD_MCLK high to LCD_D[15:0] invalid (write)
6 t_{d(LCD_E_A})
Delay time, LCD_MCLK high to LCD_AC_ENB_CS low
7 t_{d(LCD_E_I)}
Delay time, LCD_MCLK high to LCD_AC_ENB_CS high
8 t_{d(LCD_A_A)}
Delay time, LCD_MCLK high to LCD_VSYNC low
9 t_{d(LCD_A_I)}
Delay time, LCD_MCLK high to LCD_VSYNC high
10 t_{d(LCD_W_A)}
Delay time, LCD_MCLK high to LCD_HSYNC low
11 t_{d(LCD_W_I)}
Delay time, LCD_MCLK high to LCD_HSYNC high
12 t_{d(LCD_STRB_A)} Delay time, LCD_MCLK high to LCD_PCLK active
13 t_{d(LCD_STRB_I)} Delay time, LCD_MCLK high to LCD_PCLK inactive
14 t_{d(LCD_D_Z)}
Delay time, LCD_MCLK high to LCD_D[15:0] in 3-state
15 t_{d(Z_LCD_D)}
Delay time, LCD_MCLK high to LCD_D[15:0] (valid from 3-state)
1.3V, 1.2V,
1.1V
MIN MAX
0
7
0
7
0
7
0
7
0
7
0
7
0
7
0
7
0
7
0
7
0
7
0
7
1.0V
MIN MAX
0
9
0
9
0
9
0
9
0
9
0
9
0
9
0
9
0
9
0
9
0
9
0
9
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
2
3
LCD_MCLK
W_SU
(0 to 31)
4
W_STROBE
(1 to 63)
LCD_D[15:0]
Write Data
CS_DELAY
W_HOLD
(1 to 15)
5
R_SU
(0 to 31)
R_STROBE
(1 to 63)
R_HOLD
(1 to 15)
14
17
16
Read Status
CS_DELAY
15
Data[7:0]
LCD_PCLK
LCD_VSYNC
LCD_HSYNC
LCD_AC_ENB_CS
8
10
11
12
13
Not Used
9
RS
12
13
R/W
E0
E1
Figure 6-52. Character Display HD44780 Write
196 Peripheral Information and Electrical Specifications
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