AM1808_16 Datasheet, PDF (118/265 Pages) Texas Instruments – AM1808 ARM® Microprocessor

AM1808
SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
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6.11.3.10 VREF Routing
VREF is used as a reference by the input buffers of the DDR2/mDDR memories as well as the device.
VREF is intended to be half the DDR2/mDDR power supply voltage and should be created using a
resistive divider as shown in Figure 6-16. Other methods of creating VREF are not recommended.
Figure 6-20 shows the layout guidelines for VREF.
VREF Bypass Capacitor
DDR2/mDDR Device
A1
VREF Nominal Minimum
Trace Width is 20 Mils
DDR2/mDDR
A1
Neck down to minimum in BGA escape
regions is acceptable. Narrowing to
accomodate via congestion for short
distances is also acceptable. Best
performance is obtained if the width
of VREF is maximized.
Figure 6-20. VREF Routing and Topology
118 Peripheral Information and Electrical Specifications
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